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Mira
2024-12-15 00:34:01 +06:00
commit 31efbc726f
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242
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/app_start.c Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "rtl8195a.h"
#include "build_info.h"
#ifdef PLATFORM_FREERTOS
#include "FreeRTOS.h"
#include "task.h"
#endif
#if defined (CONFIG_USB_EN) && defined(CONFIG_USB_HOST_ONLY)
extern void _usb_init(void);
#endif
#if defined(CONFIG_SDIO_DEVICE_EN) && defined(CONFIG_SDIO_DEVICE_NORMAL)
extern VOID HalSdioInit(VOID);
#endif
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
extern void init_rom_wlan_ram_map(void);
extern VOID wlan_network(VOID);
#endif
//3 Monitor App Function
extern VOID RtlConsolInitRam(u32 Boot, u32 TBLSz, VOID *pTBL);
#ifndef CONFIG_KERNEL
extern VOID RtlConsolTaskRom(VOID *Data);
#endif
#ifndef CONFIG_WITHOUT_MONITOR
extern COMMAND_TABLE UartLogRamCmdTable[];
extern u32 GetRamCmdNum(VOID);
extern VOID UartLogIrqHandleRam(VOID * Data);
#endif
#ifdef CONFIG_APP_DEMO
#define MAIN_APP_DEFAULT_STACK_SIZE 2048
#define MAIN_APP_DEFAULT_PRIORITY (tskIDLE_PRIORITY + 1)
#endif
#ifdef CONFIG_MBED_ENABLED
extern void __libc_fini_array (void);
extern void __libc_init_array (void);
extern void SVC_Handler (void);
extern void PendSV_Handler (void);
extern void SysTick_Handler (void);
#endif
#ifndef CONFIG_WITHOUT_MONITOR
static
VOID
ReRegisterPlatformLogUart(
VOID
)
{
IRQ_HANDLE UartIrqHandle;
//4 Register Log Uart Callback function
UartIrqHandle.Data = (u32)NULL;//(u32)&UartAdapter;
UartIrqHandle.IrqNum = UART_LOG_IRQ;
UartIrqHandle.IrqFun = (IRQ_FUN) UartLogIrqHandleRam;
UartIrqHandle.Priority = 5;
//4 Register Isr handle
InterruptUnRegister(&UartIrqHandle);
InterruptRegister(&UartIrqHandle);
#if !TASK_SCHEDULER_DISABLED
RtlConsolInitRam((u32)RAM_STAGE,(u32)GetRamCmdNum(),(VOID*)&UartLogRamCmdTable);
#else
RtlConsolInitRam((u32)ROM_STAGE,(u32)GetRamCmdNum(),(VOID*)&UartLogRamCmdTable);
#endif
}
#endif // end of "#ifndef CONFIG_WITHOUT_MONITOR"
VOID ShowRamBuildInfo(VOID)
{
/*
DBG_8195A("=========================================================\n\n");
//DBG_8195A("Build Time: "UTS_VERSION"\n");
DBG_8195A("Build Time: "RTL8195AFW_COMPILE_TIME"\n");
DBG_8195A("Build Author: "RTL8195AFW_COMPILE_BY"\n");
DBG_8195A("Build Host: "RTL8195AFW_COMPILE_HOST"\n");
DBG_8195A("Build ToolChain Version: "RTL195AFW_COMPILER"\n\n");
DBG_8195A("=========================================================\n");
*/
}
#ifdef CONFIG_APP_DEMO
#include "device.h"
#include "gpio_api.h" // mbed
_WEAK int main(void)
{
gpio_t gpio_led;
#ifndef CONFIG_WITHOUT_MONITOR
ReRegisterPlatformLogUart();
#endif
// Init LED control pin
gpio_init(&gpio_led, PC_5);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
while(1){
gpio_write(&gpio_led, !gpio_read(&gpio_led));
RtlMsleepOS(1000);
}
return 0;
}
#else
//default main
_WEAK int main(void)
{
// Init SDIO
#if defined(CONFIG_SDIO_DEVICE_EN) && defined(CONFIG_SDIO_DEVICE_NORMAL)
HalSdioInit();
#endif
#ifndef CONFIG_WITHOUT_MONITOR
ReRegisterPlatformLogUart();
#endif
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
wlan_network();
#else
#if defined (CONFIG_USB_EN) && defined(CONFIG_USB_HOST_ONLY)
_usb_init();
#endif
#endif // end of else of "#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)"
//3 4)Enable Schedule
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
#ifdef PLATFORM_FREERTOS
vTaskStartScheduler();
#endif
#else
RtlConsolTaskRom(NULL);
#endif
return 0;
}
#endif // end of #if CONFIG_APP_DEMO
__weak void __low_level_init(void)
{
// weak function
}
#if defined ( __ICCARM__ )
#pragma section="SDRBSS"
#pragma section="TCMBSS"
#endif
// The Main App entry point
void _AppStart(void)
{
#ifdef CONFIG_MBED_ENABLED
InterruptForOSInit((VOID*)SVC_Handler,
(VOID*)PendSV_Handler,
(VOID*)SysTick_Handler);
__asm (
"ldr r0, =SystemInit\n"
"blx r0\n"
"ldr r0, =_start\n"
"bx r0\n"
);
for(;;);
#else
// It's Not Mbed BSP
#ifdef CONFIG_KERNEL
#endif
// Disable debug info log of spiflash
DBG_INFO_MSG_OFF(_DBG_SPI_FLASH_);
#ifdef CONFIG_APP_DEMO
#ifdef PLATFORM_FREERTOS
xTaskCreate( (TaskFunction_t)main, "MAIN_APP__TASK", (MAIN_APP_DEFAULT_STACK_SIZE/4), (void *)NULL, MAIN_APP_DEFAULT_PRIORITY, NULL);
vTaskStartScheduler();
#endif
#else
__low_level_init();
#if defined ( __ICCARM__ )
// __iar_data_init3 replaced by __iar_cstart_call_ctors, just do c++ constructor,
__iar_cstart_call_ctors(NULL);
// clear SDRAM bss
u8* __sdram_bss_start__ = (u8*)__section_begin("SDRBSS");
u8* __sdram_bss_end__ = (u8*)__section_end("SDRBSS");
//DiagPrintf("clean sdram bss %8x to %8x\n\r", __sdram_bss_start__, __sdram_bss_end__);
if((int)__sdram_bss_end__-(int)__sdram_bss_start__ > 0)
memset(__sdram_bss_start__, 0, (int)__sdram_bss_end__-(int)__sdram_bss_start__);
// clear TCM bss
u8* __tcm_bss_start__ = (u8*)__section_begin("TCMBSS");
u8* __tcm_bss_end__ = (u8*)__section_end("TCMBSS");
//DiagPrintf("IAR - clean tcm bss %8x to %8x\n\r", __tcm_bss_start__, __tcm_bss_end__);
if((int)__tcm_bss_end__-(int)__tcm_bss_start__ > 0)
memset(__tcm_bss_start__, 0, (int)__tcm_bss_end__-(int)__tcm_bss_start__);
#elif defined ( __GNUC__ )
// clear SDRAM bss
extern u8 __sdram_bss_start__[];
extern u8 __sdram_bss_end__[];
//DiagPrintf("clean sdram bss %8x to %8x\n\r", __sdram_bss_start__, __sdram_bss_end__);
if((int)__sdram_bss_end__-(int)__sdram_bss_start__ > 0)
_memset(__sdram_bss_start__, 0, (int)__sdram_bss_end__-(int)__sdram_bss_start__);
// clear SDRAM bss
extern u8 __tcm_bss_start__[];
extern u8 __tcm_bss_end__[];
//DiagPrintf("GCC - clean tcm bss %8x to %8x\n\r", __tcm_bss_start__, __tcm_bss_end__);
if((int)__tcm_bss_end__-(int)__tcm_bss_start__ > 0)
_memset(__tcm_bss_start__, 0, (int)__tcm_bss_end__-(int)__tcm_bss_start__);
#else
#error !!!!!!NOT Support this compiler!!!!!!
#endif
// force SP align to 8 byte not 4 byte (initial SP is 4 byte align)
__asm(
"mov r0, sp\n"
"bic r0, r0, #7\n"
"mov sp, r0\n"
);
main();
#if defined ( __ICCARM__ )
// for compile issue, If user never call this function, Liking fail
__iar_data_init3();
#endif
#endif // end of #if CONFIG_APP_DEMO
#endif // end of else of "#ifdef CONFIG_MBED_ENABLED"
}

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lib/amb1_sdk/soc/realtek/8195a/cmsis/device/cmsis.h Normal file
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/* mbed Microcontroller Library
* A generic CMSIS include header
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#include "rtl8195a.h"
#include "cmsis_nvic.h"
#endif

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lib/amb1_sdk/soc/realtek/8195a/cmsis/device/cmsis_nvic.c Normal file
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/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Vectors positioned at start of RAM
#define NVIC_ROM_VECTOR_ADDRESS (0x00000000) // Initial vector position at start of ROM
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t *)SCB->VTOR;
uint32_t i;
// Copy and switch to dynamic vectors if the first time called
if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
uint32_t *old_vectors = vectors;
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
for (i=0; i<NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
}

54
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/cmsis_nvic.h Normal file
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/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
// CORE: 64 vectors = 64 bytes from 0x00 to 0x3F
// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to ...
// Total: 128 vectors = 512 bytes (0x200) to be reserved in RAM
#define NVIC_NUM_VECTORS 128
#define NVIC_USER_IRQ_OFFSET 64
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}
#endif
#endif

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lib/amb1_sdk/soc/realtek/8195a/cmsis/device/diag.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _DIAG_H_
#define _DIAG_H_
#include "platform_autoconf.h"
#include "basic_types.h"
#include <stddef.h> /* for size_t */
extern u32 ConfigDebugErr;
extern u32 ConfigDebugInfo;
extern u32 ConfigDebugWarn;
extern u32 CfgSysDebugErr;
extern u32 CfgSysDebugInfo;
extern u32 CfgSysDebugWarn;
#define DBG_ERR_MSG_ON(x) (ConfigDebugErr |= (x))
#define DBG_WARN_MSG_ON(x) (ConfigDebugWarn |= (x))
#define DBG_INFO_MSG_ON(x) (ConfigDebugInfo |= (x))
#define DBG_ERR_MSG_OFF(x) (ConfigDebugErr &= ~(x))
#define DBG_WARN_MSG_OFF(x) (ConfigDebugWarn &= ~(x))
#define DBG_INFO_MSG_OFF(x) (ConfigDebugInfo &= ~(x))
// Define debug group
#define _DBG_BOOT_ 0x00000001
#define _DBG_GDMA_ 0x00000002
#define _DBG_GPIO_ 0x00000004
#define _DBG_TIMER_ 0x00000008
#define _DBG_I2C_ 0x00000010
#define _DBG_I2S_ 0x00000020
#define _DBG_MII_ 0x00000040
#define _DBG_NFC_ 0x00000080
#define _DBG_PCM_ 0x00000100
#define _DBG_PWM_ 0x00000200
#define _DBG_SDIO_ 0x00000400
#define _DBG_SSI_ 0x00000800
#define _DBG_SPI_FLASH_ 0x00001000
#define _DBG_SDR_ 0x00002000
#define _DBG_UART_ 0x00004000
#define _DBG_USB_OTG_ 0x00008000
#define _DBG_USB_CORE_ 0x00010000
#define _DBG_CRYPTO_ 0x00020000
#define _DBG_ADC_ 0x00040000
#define _DBG_DAC_ 0x00080000
#define _DBG_MISC_ 0x40000000
#define _DBG_FAULT_ 0x80000000
typedef enum _SYSTEM_DBG_DEFINE_ {
_SYSDBG_MISC_ = 1<<0,
_SYSDBG_MAILBOX_ = 1<<1,
_SYSDBG_TIMER_ = 1<<2
} SYSTEM_DBG;
extern
_LONG_CALL_ROM_ u32
DiagPrintf(
IN const char *fmt, ...
);
u32
DiagSPrintf(
IN u8 *buf,
IN const char *fmt, ...
);
int
prvDiagPrintf(
IN const char *fmt, ...
);
int
prvDiagSPrintf(
IN char *buf,
IN const char *fmt, ...
);
#define _DbgDump DiagPrintf
#define DRIVER_PREFIX "RTL8195A[Driver]: "
#define HAL_PREFIX "RTL8195A[HAL]: "
#define DMA_PREFIX "RTL8195A[DMA]: "
#define SDIO_PREFIX "RTL8195A[SDIO]"
#define MBOX_PREFIX "[OS-MBOX]"
#define TIMER_PREFIX "[OS-TMR]"
#define BOOT_ERR_PREFIX "[BOOT Err]"
#define BOOT_WARN_PREFIX "[BOOT Wrn]"
#define BOOT_INFO_PREFIX "[BOOT Inf]"
#define GDMA_ERR_PREFIX "[GDMA Err]"
#define GDMA_WARN_PREFIX "[GDMA Wrn]"
#define GDMA_INFO_PREFIX "[GDMA Inf]"
#define GPIO_ERR_PREFIX "[GPIO Err]"
#define GPIO_WARN_PREFIX "[GPIO Wrn]"
#define GPIO_INFO_PREFIX "[GPIO Inf]"
#define TIMER_ERR_PREFIX "[TIMR Err]"
#define TIMER_WARN_PREFIX "[TIMR Wrn]"
#define TIMER_INFO_PREFIX "[TIMR Inf]"
#define I2C_ERR_PREFIX "[I2C Err]"
#define I2C_WARN_PREFIX "[I2C Wrn]"
#define I2C_INFO_PREFIX "[I2C Inf]"
#define I2S_ERR_PREFIX "[I2S Err]"
#define I2S_WARN_PREFIX "[I2S Wrn]"
#define I2S_INFO_PREFIX "[I2S Inf]"
#define MII_ERR_PREFIX "[MII Err]"
#define MII_WARN_PREFIX "[MII Wrn]"
#define MII_INFO_PREFIX "[MII Inf]"
#define NFC_ERR_PREFIX "[NFC Err]"
#define NFC_WARN_PREFIX "[NFC Wrn]"
#define NFC_INFO_PREFIX "[NFC Inf]"
#define PCM_ERR_PREFIX "[PCM Err]"
#define PCM_WARN_PREFIX "[PCM Wrn]"
#define PCM_INFO_PREFIX "[PCM Inf]"
#define PWM_ERR_PREFIX "[PWM Err]"
#define PWM_WARN_PREFIX "[PWM Wrn]"
#define PWM_INFO_PREFIX "[PWM Inf]"
#define SSI_ERR_PREFIX "[SSI Err]"
#define SSI_WARN_PREFIX "[SSI Wrn]"
#define SSI_INFO_PREFIX "[SSI Inf]"
#define SDIO_ERR_PREFIX "[SDIO Err]"
#define SDIO_WARN_PREFIX "[SDIO Wrn]"
#define SDIO_INFO_PREFIX "[SDIO Inf]"
#define SPIF_ERR_PREFIX "[SPIF Err]"
#define SPIF_WARN_PREFIX "[SPIF Wrn]"
#define SPIF_INFO_PREFIX "[SPIF Inf]"
#define SDR_ERR_PREFIX "[SDR Err]"
#define SDR_WARN_PREFIX "[SDR Wrn]"
#define SDR_INFO_PREFIX "[SDR Inf]"
#define UART_ERR_PREFIX "[UART Err]"
#define UART_WARN_PREFIX "[UART Wrn]"
#define UART_INFO_PREFIX "[UART Inf]"
#define USB_ERR_PREFIX "[USB Err]"
#define USB_WARN_PREFIX "[USB Wrn]"
#define USB_INFO_PREFIX "[USB Inf]"
#define IPSEC_ERR_PREFIX "[CRYP Err]"
#define IPSEC_WARN_PREFIX "[CRYP Wrn]"
#define IPSEC_INFO_PREFIX "[CRYP Inf]"
#define ADC_ERR_PREFIX "[ADC Err]"
#define ADC_WARN_PREFIX "[ADC Wrn]"
#define ADC_INFO_PREFIX "[ADC Inf]"
#define DAC_ERR_PREFIX "[DAC Err]"
#define DAC_WARN_PREFIX "[DAC Wrn]"
#define DAC_INFO_PREFIX "[DAC Inf]"
#define MISC_ERR_PREFIX "[MISC Err]"
#define MISC_WARN_PREFIX "[MISC Wrn]"
#define MISC_INFO_PREFIX "[MISC Inf]"
#define OTG_ERR_PREFIX "[OTG Err]"
#define OTG_WARN_PREFIX "[OTG Wrn]"
#define OTG_INFO_PREFIX "[OTG Inf]"
#define OTG_PREFIX "RTL8195A[OTG]: "
#define OTG_PREFIX_LVL "RTL8195A[OTG_LVL_%2x]: "
//#ifdef
#define CONFIG_DEBUG_ERROR 1
#define CONFIG_DEBUG_WARN 1
#define CONFIG_DEBUG_INFO 1
#ifndef likely
#define likely(x) (x)
#define unlikely(x) (x)
#endif
#ifdef CONFIG_DEBUG_LOG
#if CONFIG_DEBUG_ERROR // if Build-In Debug Error Message
#define DBG_BOOT_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_BOOT_)) \
_DbgDump("\r"BOOT_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_GDMA_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_GDMA_)) \
_DbgDump("\r"GDMA_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_GPIO_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_GPIO_)) \
_DbgDump("\r"GPIO_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_TIMER_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_TIMER_)) \
_DbgDump("\r"TIMER_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_I2C_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_I2C_)) \
_DbgDump("\r"I2C_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_I2S_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_I2S_)) \
_DbgDump("\r"I2S_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_MII_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_MII_)) \
_DbgDump("\r"MII_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_NFC_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_NFC_)) \
_DbgDump("\r"NFC_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_PCM_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_PCM_)) \
_DbgDump("\r"PCM_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_PWM_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_PWM_)) \
_DbgDump("\r"PWM_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SSI_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_SSI_)) \
_DbgDump("\r"SSI_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SDIO_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_SDIO_)) \
_DbgDump("\r"SDIO_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SPIF_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_SPI_FLASH_)) \
_DbgDump("\r"SPIF_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SDR_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_SDR_)) \
_DbgDump("\r"SDR_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_UART_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_UART_)) \
_DbgDump("\r"UART_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_USBOTG_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_USB_OTG_)) \
_DbgDump("\r" __VA_ARGS__);\
}while(0)
#define DBG_USBCOR_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_USB_CORE_)) \
_DbgDump("\r"USB_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_CRYPTO_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_CRYPTO_)) \
_DbgDump("\r"IPSEC_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_ADC_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_ADC_)) \
_DbgDump("\r"ADC_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_DAC_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_DAC_)) \
_DbgDump("\r"DAC_ERR_PREFIX __VA_ARGS__);\
}while(0)
#define MSG_MBOX_ERR(...) do {\
if (likely(CfgSysDebugErr & _SYSDBG_MAILBOX_)) \
_DbgDump("\r"MBOX_PREFIX __VA_ARGS__);\
}while(0)
#define MSG_TIMER_ERR(...) do {\
if (likely(CfgSysDebugErr & _SYSDBG_TIMER_)) \
_DbgDump("\r"TIMER_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_OTG(...) do{\
if (unlikely(ConfigDebugInfo & _DBG_USB_OTG_)) \
_DbgDump("\r"OTG_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_OTG_INFO(...) do{\
if (unlikely(ConfigDebugInfo & _DBG_USB_OTG_)) \
_DbgDump("\r"OTG_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_OTG_WARN(...) do{\
if (unlikely(ConfigDebugWarn & _DBG_USB_OTG_)) \
_DbgDump("\r"OTG_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_OTG_ERR(...) do{\
if (unlikely(ConfigDebugErr & _DBG_USB_OTG_)) \
_DbgDump("\r"OTG_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_OTG_LVL(LVL,...) do{\
if (unlikely(ConfigDebugInfo & _DBG_USB_OTG_)){ \
_DbgDump("\r"OTG_PREFIX_LVL,LVL);\
_DbgDump(__VA_ARGS__);\
}\
}while(0)
#define DBG_MISC_ERR(...) do {\
if (likely(ConfigDebugErr & _DBG_MISC_)) \
_DbgDump("\r"MISC_ERR_PREFIX __VA_ARGS__);\
}while(0)
#else // else of "#if CONFIG_DEBUG_ERROR"
#define DBG_BOOT_ERR(...)
#define DBG_GDMA_ERR(...)
#define DBG_GPIO_ERR(...)
#define DBG_TIMER_ERR(...)
#define DBG_I2C_ERR(...)
#define DBG_I2S_ERR(...)
#define DBG_MII_ERR(...)
#define DBG_NFC_ERR(...)
#define DBG_PCM_ERR(...)
#define DBG_PWM_ERR(...)
#define DBG_SSI_ERR(...)
#define DBG_SDIO_ERR(...)
#define DBG_SPIF_ERR(...)
#define DBG_SDR_ERR(...)
#define DBG_UART_ERR(...)
#define DBG_USBOTG_ERR(...)
#define DBG_USBCOR_ERR(...)
#define DBG_CRYPTO_ERR(...)
#define DBG_ADC_ERR(...)
#define DBG_DAC_ERR(...)
#define MSG_MBOX_ERR(...)
#define MSG_TIMER_ERR(...)
#define DBG_8195A_OTG(...)
#define DBG_8195A_OTG_LVL(LVL,...)
#define DBG_8195A_OTG_INFO(...)
#define DBG_8195A_OTG_WARN(...)
#define DBG_8195A_OTG_ERR(...)
#endif // end of else of "#if CONFIG_DEBUG_ERROR"
// =============================================================
#if CONFIG_DEBUG_WARN // if Build-In Debug Warring Message
#define DBG_BOOT_WARN(...) do {\
if (unlikely(ConfigDebugWarn& _DBG_BOOT_)) \
_DbgDump("\r"BOOT_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_GDMA_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_GDMA_)) \
_DbgDump("\r"GDMA_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_GPIO_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_GPIO_)) \
_DbgDump("\r"GPIO_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_TIMER_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_TIMER_)) \
_DbgDump("\r"TIMER_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_I2C_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_I2C_)) \
_DbgDump("\r"I2C_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_I2S_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_I2S_)) \
_DbgDump("\r"I2S_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_MII_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_MII_)) \
_DbgDump("\r"MII_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_NFC_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_NFC_)) \
_DbgDump("\r"NFC_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_PCM_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_PCM_)) \
_DbgDump("\r"PCM_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_PWM_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_PWM_)) \
_DbgDump("\r"PWM_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SSI_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_SSI_)) \
_DbgDump("\r"SSI_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SDIO_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_SDIO_)) \
_DbgDump("\r"SDIO_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SPIF_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_SPI_FLASH_)) \
_DbgDump("\r"SPIF_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SDR_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_SDR_)) \
_DbgDump("\r"SDR_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_UART_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_UART_)) \
_DbgDump("\r"UART_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_USBOTG_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_USB_OTG_)) \
_DbgDump("\r" __VA_ARGS__);\
}while(0)
#define DBG_USBCOR_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_USB_CORE_)) \
_DbgDump("\r"USB_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_CRYPTO_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_CRYPTO_)) \
_DbgDump("\r"IPSEC_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_ADC_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_ADC_)) \
_DbgDump("\r"ADC_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_DAC_WARN(...) do {\
if (unlikely(ConfigDebugWarn & _DBG_DAC_)) \
_DbgDump("\r"DAC_WARN_PREFIX __VA_ARGS__);\
}while(0)
#define MSG_MBOX_WARN(...) do {\
if (unlikely(CfgSysDebugWarn& _SYSDBG_MAILBOX_)) \
_DbgDump("\r"MBOX_PREFIX __VA_ARGS__);\
}while(0)
#define MSG_TIMER_WARN(...) do {\
if (unlikely(CfgSysDebugWarn & _SYSDBG_TIMER_)) \
_DbgDump("\r"TIMER_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_MISC_WARN(...) do {\
if (likely(ConfigDebugWarn & _DBG_MISC_)) \
_DbgDump("\r"MISC_WARN_PREFIX __VA_ARGS__);\
}while(0)
#else // else of "#if CONFIG_DEBUG_WARN"
#define DBG_BOOT_WARN(...)
#define DBG_GDMA_WARN(...)
#define DBG_GPIO_WARN(...)
#define DBG_TIMER_WARN(...)
#define DBG_I2C_WARN(...)
#define DBG_I2S_WARN(...)
#define DBG_MII_WARN(...)
#define DBG_NFC_WARN(...)
#define DBG_PCM_WARN(...)
#define DBG_PWM_WARN(...)
#define DBG_SSI_WARN(...)
#define DBG_SDIO_WARN(...)
#define DBG_SPIF_WARN(...)
#define DBG_SDR_WARN(...)
#define DBG_UART_WARN(...)
#define DBG_USBOTG_WARN(...)
#define DBG_USBCOR_WARN(...)
#define DBG_CRYPTO_WARN(...)
#define DBG_ADC_WARN(...)
#define DBG_DAC_WARN(...)
#define DBG_MISC_WARN(...)
#define MSG_MBOX_WARN(...)
#define MSG_TIMER_WARN(...)
#endif // end of else of "#if CONFIG_DEBUG_WARN"
// =============================================================
#if CONFIG_DEBUG_INFO // if Build-In Debug Information Message
#define DBG_BOOT_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_BOOT_)) \
_DbgDump("\r"BOOT_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_GDMA_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_GDMA_)) \
_DbgDump("\r"GDMA_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_GPIO_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_GPIO_)) \
_DbgDump("\r"GPIO_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_TIMER_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_TIMER_)) \
_DbgDump("\r"TIMER_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_I2C_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_I2C_)) \
_DbgDump("\r"I2C_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_I2S_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_I2S_)) \
_DbgDump("\r"I2S_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_MII_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_MII_)) \
_DbgDump("\r"MII_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_NFC_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_NFC_)) \
_DbgDump("\r"NFC_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_PCM_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_PCM_)) \
_DbgDump("\r"PCM_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_PWM_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_PWM_)) \
_DbgDump("\r"PWM_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SSI_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_SSI_)) \
_DbgDump("\r"SSI_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SDIO_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_SDIO_)) \
_DbgDump("\r"SDIO_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SPIF_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_SPI_FLASH_)) \
_DbgDump("\r"SPIF_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_SDR_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_SDR_)) \
_DbgDump("\r"SDR_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_UART_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_UART_)) \
_DbgDump("\r"UART_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_USBOTG_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_USB_OTG_)) \
_DbgDump("\r" __VA_ARGS__);\
}while(0)
#define DBG_USBCOR_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_USB_CORE_)) \
_DbgDump("\r"USB_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_CRYPTO_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_CRYPTO_)) \
_DbgDump("\r"IPSEC_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_ADC_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_ADC_)) \
_DbgDump("\r"ADC_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_DAC_INFO(...) do {\
if (unlikely(ConfigDebugInfo & _DBG_DAC_)) \
_DbgDump("\r"DAC_INFO_PREFIX __VA_ARGS__);\
}while(0)
#define MSG_MBOX_INFO(...) do {\
if (unlikely(CfgSysDebugInfo & _SYSDBG_MAILBOX_)) \
_DbgDump("\r"MBOX_PREFIX __VA_ARGS__);\
}while(0)
#define MSG_TIMER_INFO(...) do {\
if (unlikely(CfgSysDebugInfo & _SYSDBG_TIMER_)) \
_DbgDump("\r"TIMER_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_MISC_INFO(...) do {\
if (likely(ConfigDebugInfo & _DBG_MISC_)) \
_DbgDump("\r"MISC_INFO_PREFIX __VA_ARGS__);\
}while(0)
#else // else of "#if CONFIG_DEBUG_INFO"
#define DBG_BOOT_INFO(...)
#define DBG_GDMA_INFO(...)
#define DBG_GPIO_INFO(...)
#define DBG_TIMER_INFO(...)
#define DBG_I2C_INFO(...)
#define DBG_I2S_INFO(...)
#define DBG_MII_INFO(...)
#define DBG_NFC_INFO(...)
#define DBG_PCM_INFO(...)
#define DBG_PWM_INFO(...)
#define DBG_SSI_INFO(...)
#define DBG_SDIO_INFO(...)
#define DBG_SPIF_INFO(...)
#define DBG_SDR_INFO(...)
#define DBG_UART_INFO(...)
#define DBG_USBOTG_INFO(...)
#define DBG_USBCOR_INFO(...)
#define DBG_CRYPTO_INFO(...)
#define DBG_ADC_INFO(...)
#define DBG_DAC_INFO(...)
#define DBG_MISC_INFO(...)
#define MSG_MBOX_INFO(...)
#define MSG_TIMER_INFO(...)
#endif // end of else of "#if CONFIG_DEBUG_INFO"
#define DBG_8195A_DRIVER(...) do {\
if (unlikely(ConfigDebugErr & (_DBG_I2S_|_DBG_PCM_|_DBG_TIMER_))) \
_DbgDump("\r"DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_HAL(...) do {\
if (unlikely(ConfigDebugErr & (_DBG_SDR_|_DBG_MISC_))) \
_DbgDump("\r"HAL_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_DMA(...) do {\
if (unlikely(ConfigDebugErr & _DBG_GDMA_)) \
_DbgDump("\r"DMA_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A_SDIO(...) do {\
if (unlikely(ConfigDebugErr & _DBG_SDIO_)) \
_DbgDump("\r"SDIO_PREFIX __VA_ARGS__);\
}while(0)
#define DBG_8195A(...) do {\
if (unlikely(ConfigDebugErr & _DBG_MISC_)) \
_DbgDump("\r" __VA_ARGS__);\
}while(0)
#define MONITOR_LOG(...) do {\
if (unlikely(ConfigDebugErr & _DBG_MISC_)) \
_DbgDump( __VA_ARGS__);\
}while(0)
#define DBG_ERROR_LOG(...) do {\
if (unlikely(ConfigDebugErr & _DBG_FAULT_)) \
_DbgDump( __VA_ARGS__);\
}while(0)
#ifdef __GNUC__
#define DBG_ASSERT(x) do {\
if (unlikely(!(x))) \
_DbgDump("Assertion: %s:%s, %d\n", __FILE__, __func__, __LINE__);\
}while(0)
#endif
#ifdef __ICCARM__
#define DBG_ASSERT(x) do {\
if (unlikely(!(x))) \
_DbgDump("Assertion: %s:%s, %d\n", __FILE__, __func__, __LINE__);\
}while(0)
#endif
#else // else of "#if CONFIG_DEBUG_LOG"
#define DBG_8195A_DRIVER(...)
#define DBG_8195A_HAL(...)
#define DBG_8195A(...)
#define DBG_8195A_DMA(...)
#define MONITOR_LOG(...)
#define DBG_ERROR_LOG(...)
#define DBG_8195A_SDIO(...)
#define DBG_BOOT_ERR(...)
#define DBG_GDMA_ERR(...)
#define DBG_GPIO_ERR(...)
#define DBG_TIMER_ERR(...)
#define DBG_I2C_ERR(...)
#define DBG_I2S_ERR(...)
#define DBG_MII_ERR(...)
#define DBG_NFC_ERR(...)
#define DBG_PCM_ERR(...)
#define DBG_PWM_ERR(...)
#define DBG_SSI_ERR(...)
#define DBG_SDIO_ERR(...)
#define DBG_SPIF_ERR(...)
#define DBG_SDR_ERR(...)
#define DBG_UART_ERR(...)
#define DBG_USBOTG_ERR(...)
#define DBG_USBCOR_ERR(...)
#define DBG_CRYPTO_ERR(...)
#define DBG_ADC_ERR(...)
#define DBG_DAC_ERR(...)
#define MSG_MBOX_ERR(...)
#define MSG_TIMER_ERR(...)
#define DBG_BOOT_WARN(...)
#define DBG_GDMA_WARN(...)
#define DBG_GPIO_WARN(...)
#define DBG_TIMER_WARN(...)
#define DBG_I2C_WARN(...)
#define DBG_I2S_WARN(...)
#define DBG_MII_WARN(...)
#define DBG_NFC_WARN(...)
#define DBG_PCM_WARN(...)
#define DBG_PWM_WARN(...)
#define DBG_SSI_WARN(...)
#define DBG_SDIO_WARN(...)
#define DBG_SPIF_WARN(...)
#define DBG_SDR_WARN(...)
#define DBG_UART_WARN(...)
#define DBG_USBOTG_WARN(...)
#define DBG_USBCOR_WARN(...)
#define DBG_CRYPTO_WARN(...)
#define DBG_ADC_WARN(...)
#define DBG_DAC_WARN(...)
#define MSG_MBOX_WARN(...)
#define MSG_TIMER_WARN(...)
#define DBG_BOOT_INFO(...)
#define DBG_GDMA_INFO(...)
#define DBG_GPIO_INFO(...)
#define DBG_TIMER_INFO(...)
#define DBG_I2C_INFO(...)
#define DBG_I2S_INFO(...)
#define DBG_MII_INFO(...)
#define DBG_NFC_INFO(...)
#define DBG_PCM_INFO(...)
#define DBG_PWM_INFO(...)
#define DBG_SSI_INFO(...)
#define DBG_SDIO_INFO(...)
#define DBG_SPIF_INFO(...)
#define DBG_SDR_INFO(...)
#define DBG_UART_INFO(...)
#define DBG_USBOTG_INFO(...)
#define DBG_USBCOR_INFO(...)
#define DBG_CRYPTO_INFO(...)
#define DBG_ADC_INFO(...)
#define DBG_DAC_INFO(...)
#define MSG_MBOX_INFO(...)
#define MSG_TIMER_INFO(...)
#define DBG_ASSERT(x)
#endif
#define ANSI_COLOR_GREEN "\x1b[32m"
#define ANSI_COLOR_CYAN "\x1b[36m"
#define ANSI_COLOR_YELLOW "\x1b[33m"
#define ANSI_COLOR_MAGENTA "\x1b[35m"
#define ANSI_COLOR_RED "\x1b[31m"
#define ANSI_COLOR_BLUE "\x1b[34m"
#define ANSI_COLOR_RESET "\x1b[0m"
#define IDENT_ONE_SPACE " "
#define IDENT_TWO_SPACE " "
#define IDENT_FOUR_SPACE " "
#define IDENT_SIX_SPACE " "
#define IDENT_EIGHT_SPACE " "
#ifdef CONFIG_DEBUG_LOG
typedef enum _DBG_CFG_TYPE_ {
DBG_CFG_ERR=0,
DBG_CFG_WARN=1,
DBG_CFG_INFO=2
} DBG_CFG_TYPE;
typedef struct _DBG_CFG_CMD_ {
u8 cmd_name[16];
u32 cmd_type;
} DBG_CFG_CMD, *PDBG_CFG_CMD;
#endif
typedef enum _CONSOLE_OP_STAGE_ {
ROM_STAGE = 0,
RAM_STAGE = 1
}CONSOLE_OP_STAGE;
#endif //_DIAG_H_

15
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/rand.h Normal file
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@@ -0,0 +1,15 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
u32
Rand (
VOID
);

41
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/rtl_stdlib.h Normal file
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@@ -0,0 +1,41 @@
/*
* Routines for standard lib access
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL_STDLIB_H_
#define _RTL_STDLIB_H_
#include <basic_types.h>
#include <strproc.h>
#include <diag.h>
//
// string operation
//
#define strlen(str) prvStrLen((const u8*)str)
#define strcmp(str1, str2) prvStrCmp((const u8*)str1, (const u8*)str2)
#define sscanf(src, format...) //TODO
#define strtok(str, delim) prvStrTok(str, delim)
#define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src)
#define atoi(str) prvAtoi(str)
#define strstr(str1, str2) prvStrStr(str1, str2)
//
// standard i/o
//
#define snprintf DiagSnPrintf
#define sprintf prvDiagSPrintf
#define printf prvDiagPrintf
//
// memory management
//
#define malloc pvPortMalloc
#define free vPortFree
#endif //_RTL_STDLIB_H_

70
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/rtl_utility.h Normal file
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@@ -0,0 +1,70 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL_UTILITY_H_
#define __RTL_UTILITY_H_
VOID RtlMemcpy(VOID* dec, VOID* sour, u32 sz);
u32 RtlMemcmp(VOID *dst, VOID *src, u32 sz);
VOID RtlMemset(VOID *pbuf, u32 c, u32 sz);
s8 *
RtlStrncpy(
IN s8 *dest,
IN const s8 *src,
IN SIZE_T count
);
s8 *
RtlStrcpy(
IN s8 *dest,
IN const s8 *src
);
SIZE_T
RtlStrlen(
IN const s8 *s
);
SIZE_T
RtlStrnlen(
IN const s8 *s,
IN SIZE_T count
);
int
RtlStrcmp(
IN const s8 *cs,
IN const s8 *ct
);
int
RtlStrncmp(
IN const s8 *cs,
IN const s8 *ct,
IN SIZE_T count
);
#endif

104
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/strproc.h Normal file
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@@ -0,0 +1,104 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _STRPROC_H_
#define _STRPROC_H_
#include <stddef.h> /* for size_t */
#include <stdarg.h>
#ifndef isprint
#define in_range(c, lo, up) ((u8)c >= lo && (u8)c <= up)
#define isprint(c) in_range(c, 0x20, 0x7f)
#define isdigit(c) in_range(c, '0', '9')
#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F'))
#define islower(c) in_range(c, 'a', 'z')
#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v' || c == ',')
#endif
extern _LONG_CALL_ROM_ char *_strncpy(char *dest, const char *src, size_t count);
extern _LONG_CALL_ROM_ char *_strcpy(char *dest, const char *src);
extern _LONG_CALL_ROM_ size_t _strlen(const char *s);
extern _LONG_CALL_ROM_ size_t _strnlen(const char *s, size_t count);
extern _LONG_CALL_ROM_ int _strcmp(const char *cs, const char *ct);
extern _LONG_CALL_ROM_ int _strncmp(const char *cs, const char *ct, size_t count);
extern _LONG_CALL_ROM_ int _sscanf(const char *buf, const char *fmt, ...);
extern _LONG_CALL_ROM_ char *_strsep(char **s, const char *ct);
extern _LONG_CALL_ROM_ char *skip_spaces(const char *str);
extern _LONG_CALL_ROM_ int skip_atoi(const char **s);
extern _LONG_CALL_ROM_ int _vsscanf(const char *buf, const char *fmt, va_list args);
extern _LONG_CALL_ROM_ unsigned long long simple_strtoull(const char *cp, char **endp, unsigned int base);
extern _LONG_CALL_ROM_ long simple_strtol(const char *cp, char **endp, unsigned int base);
extern _LONG_CALL_ROM_ long long simple_strtoll(const char *cp, char **endp, unsigned int base);
extern _LONG_CALL_ROM_ unsigned long simple_strtoul(const char *cp, char **endp, unsigned int base);
extern _LONG_CALL_ROM_ const char *_parse_integer_fixup_radix(const char *s, unsigned int *base);
extern _LONG_CALL_ROM_ unsigned int _parse_integer(const char *s, unsigned int base, unsigned long long *p);
extern _LONG_CALL_ROM_ u64 div_u64(u64 dividend, u32 divisor);
extern _LONG_CALL_ROM_ s64 div_s64(s64 dividend, s32 divisor);
extern _LONG_CALL_ROM_ u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder);
extern _LONG_CALL_ROM_ s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder);
extern _LONG_CALL_ROM_ char *_strpbrk(const char *cs, const char *ct);
extern _LONG_CALL_ROM_ char *_strchr(const char *s, int c);
extern _LONG_CALL_ROM_ VOID
prvStrCpy(
IN u8 *pDES,
IN const u8 *pSRC
);
extern _LONG_CALL_ROM_ u32
prvStrLen(
IN const u8 *pSRC
);
extern _LONG_CALL_ROM_ u8
prvStrCmp(
IN const u8 *string1,
IN const u8 *string2
);
extern _LONG_CALL_ROM_ u8*
StrUpr(
IN u8 *string
);
extern _LONG_CALL_ROM_ int prvAtoi(
IN const char * s
);
extern _LONG_CALL_ROM_ const char * prvStrStr(
IN const char * str1,
IN const char * str2
);
/*
* Fast implementation of tolower() for internal usage. Do not use in your
* code.
*/
static inline char _tolower(const char c)
{
return c | 0x20;
}
/* Fast check for octal digit */
static inline int isodigit(const char c)
{
return c >= '0' && c <= '7';
}
#ifndef strtoul
#define strtoul(str, endp, base) simple_strtoul(str, endp, base)
#endif
#ifndef strtol
#define strtol(str, endp, base) simple_strtol(str, endp, base)
#endif
#endif

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/**************************************************************************//**
* @file system_ARMCM3.c
* @brief CMSIS Device System Source File for
* ARMCM3 Device Series
* @version V1.08
* @date 23. November 2012
*
* @note
*
******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "basic_types.h"
#include "rtl8195a.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define __HSI ( 8000000UL)
#define __XTAL ( 5000000UL) /* Oscillator frequency */
//#define __SYSTEM_CLOCK (5*__XTAL)
#define __SYSTEM_CLOCK (200000000UL/6*5)
extern unsigned int rand_x;
extern u32 HalGetCpuClk(VOID);
#ifdef CONFIG_CHIP_A_CUT
const u32 SysCpkClkTbl[]= {
200000000,
100000000,
50000000,
25000000,
12500000,
4000000
};
#endif
u32 Rand2(void)
{
static unsigned int y = 362436;
static unsigned int z = 521288629;
static unsigned int c = 7654321;
unsigned long long t, a= 698769069;
rand_x = 69069 * rand_x + 12345;
y ^= (y << 13); y ^= (y >> 17); y ^= (y << 5);
t = a * z + c; c = (t >> 32); z = t;
return rand_x + y + z;
}
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/
u32
SystemGetCpuClk(void)
{
#ifdef CONFIG_CHIP_A_CUT
u32 CpuType = 0, CpuClk = 0, FreqDown = 0;
CpuType = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
FreqDown = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1) & BIT17;
CpuClk = SysCpkClkTbl[CpuType];
if ( !FreqDown ) {
if ( CpuClk > 4000000 ){
CpuClk = (CpuClk*5/6);
}
}
return CpuClk;
#else
return HalGetCpuClk();
#endif
}
/*----------------------------------------------------------------------------
Clock functions
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
// SystemCoreClock = __SYSTEM_CLOCK;
SystemCoreClock = SystemGetCpuClk();
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System.
*/
void SystemInit (void)
{
// TODO: Hardware initial
#ifdef UNALIGNED_SUPPORT_DISABLE
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif
//SystemCoreClock = __SYSTEM_CLOCK;
//SystemCoreClock = HalGetCpuClk();
SystemCoreClockUpdate();
}

77
lib/amb1_sdk/soc/realtek/8195a/cmsis/device/system_8195a.h Normal file
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/**************************************************************************//**
* @file system_ARMCM3.h
* @brief CMSIS Device System Header File for
* ARMCM3 Device Series
* @version V1.08
* @date 23. November 2012
*
* @note
*
******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#ifndef _SYSTEM_8195A_H
#define _SYSTEM_8195A_H
#ifdef __cplusplus
extern "C" {
#endif
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
extern u32 SystemGetCpuClk(void);
extern u32 Rand2(void);
#ifdef __cplusplus
}
#endif
#endif /* _SYSTEM_8195A_H */

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lib/amb1_sdk/soc/realtek/8195a/cmsis/device/va_list.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _VA_LIST_H_
#define _VA_LIST_H_
#include "platform_autoconf.h"
#include "basic_types.h"
#ifndef va_arg //this part is adapted from linux (Linux/include/acpi/platform/acenv.h)
typedef s32 acpi_native_int;//this definition is in (Linux/include/acpi/actypes.h)
#ifndef _VALIST
#define _VALIST
typedef char *va_list;
#endif /* _VALIST */
/* Storage alignment properties */
#define _AUPBND (sizeof (acpi_native_int) - 1)
#define _ADNBND (sizeof (acpi_native_int) - 1)
/* Variable argument list macro definitions */
#define _bnd(X, bnd) (((sizeof (X)) + (bnd)) & (~(bnd)))
#define va_arg(ap, T) (*(T *)(((ap) += (_bnd (T, _AUPBND))) - (_bnd (T,_ADNBND))))
#define va_end(ap) (ap = (va_list) NULL)
#define va_start(ap, A) (void) ((ap) = (((char *) &(A)) + (_bnd (A,_AUPBND))))
#endif /* va_arg */
#endif //_VA_LIST_H_