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Mira
2024-12-15 00:34:01 +06:00
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171
lib/amb1_sdk/soc/realtek/8711b/cmsis/device/app_start.c Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "ameba_soc.h"
#include "build_info.h"
#if (defined(CONFIG_POST_SIM))
void Simulation_Init(void);
#endif
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
extern void init_rom_wlan_ram_map(void);
extern VOID wlan_network(VOID);
#endif
#ifdef CONFIG_MBED_ENABLED
extern void __libc_fini_array (void);
extern void __libc_init_array (void);
extern void SVC_Handler (void);
extern void PendSV_Handler (void);
extern void SysTick_Handler (void);
void APP_StartMbed(void)
{
InterruptForOSInit((VOID*)SVC_Handler,
(VOID*)PendSV_Handler,
(VOID*)SysTick_Handler);
__asm (
"ldr r0, =SystemInit\n"
"blx r0\n"
"ldr r0, =_start\n"
"bx r0\n"
);
for(;;);
}
#endif
void APP_InitTrace(void)
{
u32 debug[4];
#if (defined(CONFIG_POST_SIM) || defined(CONFIG_CP))
return;
#endif
debug[LEVEL_ERROR] = BIT(MODULE_BOOT);
debug[LEVEL_WARN] = 0x0;
debug[LEVEL_INFO] = BIT(MODULE_BOOT);
debug[LEVEL_TRACE] = 0x0;
#ifdef CONFIG_DEBUG_ERR_MSG
debug[LEVEL_ERROR] = 0xFFFFFFFF;
#endif
#ifdef CONFIG_DEBUG_WARN_MSG
debug[LEVEL_WARN] = 0xFFFFFFFF;
#endif
#ifdef CONFIG_DEBUG_INFO_MSG
debug[LEVEL_INFO] = 0xFFFFFFFF;
#endif
LOG_MASK(debug);
DBG_PRINTF(MODULE_BOOT, LEVEL_INFO, "APP_InitTrace: %x:%x:%x:%x\n",debug[0], debug[1], debug[2], debug[3]);
DBG_PRINTF(MODULE_BOOT, LEVEL_ERROR, "APP_InitTrace: %x:%x:%x:%x\n",debug[0], debug[1], debug[2], debug[3]);
}
//default main
_WEAK void main(void)
{
#if CONFIG_SOC_PS_MODULE
pmu_sysactive_timer_init();
#endif
#if (defined(CONFIG_POST_SIM))
Simulation_Init();
#endif
APP_InitTrace();
PMAP_Init();
#ifndef CONFIG_WITHOUT_MONITOR
ReRegisterPlatformLogUart();
#endif
#ifdef CONFIG_USB_DONGLE_NIC_EN
if(xTaskCreate(USOC_Dongle_InitThread, ((const char*)"usb_dongle"), 1024, NULL, tskIDLE_PRIORITY + 3 + PRIORITY_OFFSET, NULL) != pdPASS)
DBG_8195A("\n\r%s xTaskCreate(usb_dongle_thread) failed", __FUNCTION__);
goto end;
#endif
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
#if (!defined(CONFIG_POST_SIM) && !defined(CONFIG_RTL_SIM) && !defined(CONFIG_FT) && !defined(CONFIG_CP))
wlan_network();
#endif
#else
#endif // end of else of "#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)"
#if CONFIG_INIC_EN
#if SUPPORT_LOG_SERVICE
log_service_init();
#endif
inic_interface_init();
#endif
end:
//3 4)Enable Schedule
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
#ifdef PLATFORM_FREERTOS
vTaskStartScheduler();
#endif
#else
RtlConsolTaskRom(NULL);
#endif
}
// The Main App entry point
void APP_Start(void)
{
#if CONFIG_SOC_PS_MODULE
SOCPS_InitSYSIRQ();
#endif
#ifdef CONFIG_KERNEL
#ifdef PLATFORM_FREERTOS
InterruptForOSInit((VOID*)vPortSVCHandler,
(VOID*)xPortPendSVHandler,
(VOID*)xPortSysTickHandler);
#endif
#endif
#ifdef CONFIG_MBED_ENABLED
APP_StartMbed();
#else
#ifdef CONFIG_PINMAP_ENABLE
PMAP_Init();
#endif
#if 0//def CONFIG_APP_DEMO
#ifdef PLATFORM_FREERTOS
xTaskCreate( (TaskFunction_t)main, "MAIN_APP__TASK", (2048 /4), (void *)NULL, (tskIDLE_PRIORITY + 1), NULL);
vTaskStartScheduler();
#endif
#else
#if defined ( __ICCARM__ )
__iar_cstart_call_ctors(NULL);
#endif
// force SP align to 8 byte not 4 byte (initial SP is 4 byte align)
__asm(
"mov r0, sp\n"
"bic r0, r0, #7\n"
"mov sp, r0\n"
);
main();
#endif // end of #if CONFIG_APP_DEMO
#endif // end of else of "#ifdef CONFIG_MBED_ENABLED"
}

38
lib/amb1_sdk/soc/realtek/8711b/cmsis/device/cmsis.h Normal file
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/* mbed Microcontroller Library
* A generic CMSIS include header
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#include "ameba_soc.h"
#include "cmsis_nvic.h"
#endif

55
lib/amb1_sdk/soc/realtek/8711b/cmsis/device/cmsis_nvic.c Normal file
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/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Vectors positioned at start of RAM
#define NVIC_ROM_VECTOR_ADDRESS (0x00000000) // Initial vector position at start of ROM
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t *)SCB->VTOR;
uint32_t i;
// Copy and switch to dynamic vectors if the first time called
if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) {
uint32_t *old_vectors = vectors;
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
for (i=0; i<NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
}

54
lib/amb1_sdk/soc/realtek/8711b/cmsis/device/cmsis_nvic.h Normal file
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/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
// CORE: 64 vectors = 64 bytes from 0x00 to 0x3F
// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to ...
// Total: 128 vectors = 512 bytes (0x200) to be reserved in RAM
#define NVIC_NUM_VECTORS 128
#define NVIC_USER_IRQ_OFFSET 64
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}
#endif
#endif

180
lib/amb1_sdk/soc/realtek/8711b/cmsis/device/system_8195a.c Normal file
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/**************************************************************************//**
* @file system_ARMCM3.c
* @brief CMSIS Device System Source File for
* ARMCM3 Device Series
* @version V1.08
* @date 23. November 2012
*
* @note
*
******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "basic_types.h"
#include "ameba_soc.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define __SYSTEM_CLOCK PLATFORM_CLOCK
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/
u32
SystemGetCpuClk(void)
{
#ifdef CONFIG_FPGA
return CPU_ClkGet(_TRUE);
#else
return CPU_ClkGet(_FALSE);
#endif
}
/*----------------------------------------------------------------------------
Clock functions
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
SystemCoreClock = SystemGetCpuClk();
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System.
*/
void SystemInit (void)
{
// TODO: Hardware initial
#ifdef UNALIGNED_SUPPORT_DISABLE
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif
SystemCoreClockUpdate();
}
/**
* @brief Generate random seed
* @param none
* @return value: random seed value
*/
u32 Gen_RandomSeed(VOID)
{
u32 adc_tmp, isr, AdcTempDat;
u8 random_tmp, random[4];
ADC_TypeDef *adc = ADC;
int i, j;
/* init ADC*/
ADC_InitTypeDef AdcInitStruct;
ADC_InitStruct(&AdcInitStruct);
AdcInitStruct.ADC_BurstSz = 2;
ADC_AnaparAd[1] = 0x41004;
InterruptDis(ADC_IRQ);
PLL2_Set(BIT_SYS_SYSPLL_CK_ADC_EN, ENABLE);
RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, ENABLE);
ADC_Init(&AdcInitStruct);
/* Clear ADC Status */
ADC_INTClear();
ADC_INTConfig(BIT_ADC_FIFO_FULL_EN|BIT_ADC_FIFO_RD_REQ_EN, ENABLE);
ADC_Cmd(ENABLE);
/* B CUT ADD patch for reset fail */
AdcTempDat = adc->ANAPAR_AD1;
AdcTempDat |= BIT(0);
adc->ANAPAR_AD1 = AdcTempDat;
for(i = 0; i < 4; i++){
retry:
random_tmp = 0;
for (j = 0; j < 8; j++){
while (1) {
isr = ADC_GetISR();
if (isr & (BIT_ADC_FIFO_FULL | BIT_ADC_FIFO_RD_REQ)) {
ADC_INTClear();
adc_tmp = ADC_Read();
ADC_Read();
break;
}
}
random_tmp |= ((adc_tmp & 0x1) << j);
}
if((random_tmp == 0x00) || (random_tmp == 0xff)){
goto retry;
}
random[i] = random_tmp;
}
ADC_INTConfig(BIT_ADC_FIFO_FULL_EN|BIT_ADC_FIFO_RD_REQ_EN, DISABLE);
/* B CUT ADD patch for reset fail */
AdcTempDat = adc->ANAPAR_AD1;
AdcTempDat &= ~ BIT(0);
adc->ANAPAR_AD1 = AdcTempDat;
/* disable ADC*/
ADC_Cmd(DISABLE);
ADC_INTClear();
PLL2_Set(BIT_SYS_SYSPLL_CK_ADC_EN, DISABLE);
RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, DISABLE);
return *(u32*)random;
}
/**
* @brief get the state of rdp, enable or disable
* @retval : This parameter can be one of the following values:
* @arg TRUE: rdp is enable
* @arg FALSE: rdp is disable
*/
u32 IsRDPenabled(void)
{
u32 temp = 0;
RDP_EN_Request();
temp = HAL_READ32(SYSTEM_CTRL_BASE, REG_FW_PPROTECT_KEY_CTRL);
if(temp & BIT_RDP_EN){
return TRUE;
}else{
return FALSE;
}
}

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lib/amb1_sdk/soc/realtek/8711b/cmsis/device/system_8195a.h Normal file
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/**************************************************************************//**
* @file system_ARMCM3.h
* @brief CMSIS Device System Header File for
* ARMCM3 Device Series
* @version V1.08
* @date 23. November 2012
*
* @note
*
******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#ifndef _SYSTEM_8195A_H
#define _SYSTEM_8195A_H
#ifdef __cplusplus
extern "C" {
#endif
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
extern u32 SystemGetCpuClk(void);
/**
* @brief Generate random seed
* @param none
* @return value: random seed value
*/
u32 Gen_RandomSeed(VOID);
/**
* @brief get the state of rdp, enable or disable
* @retval : This parameter can be one of the following values:
* @arg TRUE: rdp is enable
* @arg FALSE: rdp is disable
*/
u32 IsRDPenabled(void);
#ifdef __cplusplus
}
#endif
#endif /* _SYSTEM_8195A_H */