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Mira
2024-12-15 00:34:01 +06:00
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44
lib/amb1_sdk/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_dsleepcfg.c Normal file
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/**
******************************************************************************
* @file rtl8710b_dsleepcfg.c
* @author
* @version V1.0.0
* @date 2016-05-17
* @brief This file provides firmware functions to manage the following
* functionalities of pin control:
* - dsleep wakeup event
* - dsleep power management
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include "ameba_soc.h"
/* if X can wakeup dsleep, it can wakeup dstandby & sleep */
/* if X can wakeup dstandby, it can wakeup sleep */
const PWRCFG_TypeDef dsleep_wevent_config[]=
{
// Module Status
{BIT_SYSON_WEVT_A33_AND_A33GPIO_MSK, ON}, /* dsleep: REGU A33 Timer & A33 wakepin wakeup*/
{0xFFFFFFFF, OFF}, /* Table end */
};
/* you should set BIT_SYSON_WEVT_GPIO_DSTBY_MSK ON if you use wakepin */
const WAKEPIN_TypeDef dsleep_wakepin_config[]=
{
// Module Status Polarity
{WAKUP_0_MASK, OFF, 1}, /* wakeup_0: GPIOA_18 */
{WAKUP_1_MASK, ON, 1}, /* wakeup_1: GPIOA_5 */
{WAKUP_2_MASK, OFF, 1}, /* wakeup_2: GPIOA_22 */
{WAKUP_3_MASK, OFF, 1}, /* wakeup_3: GPIOA_23 */
{0xFFFFFFFF, OFF, 0}, /* Table end */
};
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/

47
lib/amb1_sdk/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_dstandbycfg.c Normal file
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/**
******************************************************************************
* @file rtl8710b_dstandbycfg.c
* @author
* @version V1.0.0
* @date 2016-05-17
* @brief This file provides firmware functions to manage the following
* functionalities of pin control:
* - dstandby wakeup event
* - dstandby power management
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include "ameba_soc.h"
/* if X can wakeup dsleep, it can wakeup dstandby & sleep */
/* if X can wakeup dstandby, it can wakeup sleep */
const PWRCFG_TypeDef dstandby_wevent_config[]=
{
// Module Status
{BIT_SYSON_WEVT_GPIO_DSTBY_MSK, ON}, /* dstandby: wakepin 0~3 wakeup */
{BIT_SYSON_WEVT_A33_AND_A33GPIO_MSK, ON}, /* dsleep: REGU A33 Timer & A33 wakepin wakeup*/
{BIT_SYSON_WEVT_RTC_MSK, OFF}, /* dstandby: RTC Wakeup */
{BIT_SYSON_WEVT_SYSTIM_MSK, OFF}, /* dstandby: SYS Timer(ANA Timer) Wakeup */
{0xFFFFFFFF, OFF}, /* Table end */
};
/* you should set BIT_SYSON_WEVT_GPIO_DSTBY_MSK ON if you use wakepin */
const WAKEPIN_TypeDef dstandby_wakepin_config[]=
{
// Module Status Polarity
{WAKUP_0, OFF, 0}, /* wakeup_0: GPIOA_18 */
{WAKUP_1, ON, 0}, /* wakeup_1: GPIOA_5 */
{WAKUP_2, OFF, 0}, /* wakeup_2: GPIOA_22 */
{WAKUP_3, OFF, 0}, /* wakeup_3: GPIOA_23 */
{0xFFFFFFFF, OFF, 0}, /* Table end */
};
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/

34
lib/amb1_sdk/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_intfcfg.c Normal file
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/**
******************************************************************************
* @file rtl8710b_intfcfg.c
* @author
* @version V1.0.0
* @date 2016-05-17
* @brief This file provides firmware functions to manage the following
* functionalities:
* - uart mbed function config
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include "ameba_soc.h"
UARTCFG_TypeDef uart_config[2]=
{
/* UART0 */
{
.LOW_POWER_RX_ENABLE = DISABLE, /*Enable low power RX*/
},
/* UART1 */
{
.LOW_POWER_RX_ENABLE = DISABLE,
},
};
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/

69
lib/amb1_sdk/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_pinmapcfg.c Normal file
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/**
******************************************************************************
* @file rtl8710b_pinmapcfg.c
* @author
* @version V1.0.0
* @date 2016-05-17
* @brief This file provides firmware functions to manage the following
* functionalities of pin control:
* - pinmux
* - active pad pull up & pull down
* - sleep pad pull up & pull down
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include "ameba_soc.h"
const PMAP_TypeDef pmap_func[]=
{
// Pin Name Func Select Func PU/PD Slp PU/PD DrvStrenth
{_PA_14, PINMUX_FUNCTION_SWD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SWD_CLK
{_PA_15, PINMUX_FUNCTION_SWD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SWD_DATA
{_PA_13, PINMUX_FUNCTION_PWM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //PWM4
{_PA_0, PINMUX_FUNCTION_PWM, GPIO_PuPd_NOPULL, GPIO_PuPd_DOWN,PAD_DRV_STRENGTH_0}, //PWM2
{_PA_16, PINMUX_FUNCTION_PWM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //PWM1
{_PA_17, PINMUX_FUNCTION_PWM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //PWM2
{_PA_25, PINMUX_FUNCTION_UART, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART1_RXD
{_PA_26, PINMUX_FUNCTION_UART, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART1_TXD
{_PA_28, PINMUX_FUNCTION_I2C, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2C1_SCL
{_PA_27, PINMUX_FUNCTION_I2C, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2C1_SDA
{_PA_12, PINMUX_FUNCTION_PWM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //PWM3
{_PA_4, PINMUX_FUNCTION_UART, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART0_TXD
{_PA_1, PINMUX_FUNCTION_UART, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART0_RXD
{_PA_3, PINMUX_FUNCTION_UART, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART0_RTS
{_PA_2, PINMUX_FUNCTION_UART, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART0_CTS
{_PA_6, PINMUX_FUNCTION_SPIF, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPIC_CS
{_PA_7, PINMUX_FUNCTION_SPIF, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPIC_DATA1
{_PA_8, PINMUX_FUNCTION_SPIF, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPIC_DATA2
{_PA_9, PINMUX_FUNCTION_SPIF, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPIC_DATA0
{_PA_10, PINMUX_FUNCTION_SPIF, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPIC_CLK
{_PA_11, PINMUX_FUNCTION_SPIF, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPIC_DATA3
{_PA_5, PINMUX_FUNCTION_PWM, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //PWM4
{_PA_18, PINMUX_FUNCTION_SDIOD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SD_D2
{_PA_19, PINMUX_FUNCTION_SDIOD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SD_D3
{_PA_20, PINMUX_FUNCTION_SDIOD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SD_CMD
{_PA_21, PINMUX_FUNCTION_SDIOD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SD_CLK
{_PA_22, PINMUX_FUNCTION_SDIOD, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SD_D0
{_PA_23, PINMUX_FUNCTION_SDIOD, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SD_D1
{_PB_0, PINMUX_FUNCTION_SPIM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPI1_CS
{_PB_1, PINMUX_FUNCTION_SPIM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPI1_CLK
{_PB_2, PINMUX_FUNCTION_SPIM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPI1_MISO
{_PB_3, PINMUX_FUNCTION_SPIM, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //SPI1_MOSI
{_PB_4, PINMUX_FUNCTION_I2S, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2S_MCK
{_PB_5, PINMUX_FUNCTION_I2S, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2S_SD_TX
{_PA_24, PINMUX_FUNCTION_I2S, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2S_SD_RX
{_PA_31, PINMUX_FUNCTION_I2S, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2S_CLK
{_PB_6, PINMUX_FUNCTION_I2S, GPIO_PuPd_NOPULL, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //I2S_WS
{_PA_30, PINMUX_FUNCTION_UART, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART2_log_TXD
{_PA_29, PINMUX_FUNCTION_UART, GPIO_PuPd_UP, GPIO_PuPd_UP, PAD_DRV_STRENGTH_0}, //UART2_log_RXD
{_PNC, PINMUX_FUNCTION_GPIO, GPIO_PuPd_NOPULL, GPIO_PuPd_NOPULL, PAD_DRV_STRENGTH_0}, //table end
};
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/

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lib/amb1_sdk/soc/realtek/8711b/fwlib/ram_lib/rtl8710b_sleepcfg.c Normal file
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/**
******************************************************************************
* @file rtl8710b_sleepcfg.c
* @author
* @version V1.0.0
* @date 2016-05-17
* @brief This file provides firmware functions to manage the following
* functionalities of pin control:
* - sleep wakeup event
* - sleep power management
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include "ameba_soc.h"
PWRCFG_TypeDef sleep_pwrmgt_config[]=
{
// Module Status
{BIT_SYSON_PMOPT_SLP_XTAL_EN, OFF}, /* XTAL: 2.2mA */
{BIT_SYSON_PMOPT_SNZ_XTAL_EN, OFF}, /* ADC power save use it */
{BIT_SYSON_PMOPT_SNZ_SYSPLL_EN, OFF}, /* ADC power save use it */
{0xFFFFFFFF, OFF}, /* Table end */
};
/* if X can wakeup dsleep, it can wakeup dstandby & sleep */
/* if X can wakeup dstandby, it can wakeup sleep */
PWRCFG_TypeDef sleep_wevent_config[]=
{
// Module Status
{BIT_SYSON_WEVT_GPIO_DSTBY_MSK, ON}, /* dstandby: wakepin 0~3 wakeup */
{BIT_SYSON_WEVT_A33_AND_A33GPIO_MSK, ON}, /* dsleep: REGU A33 Timer(1K low precision timer) & A33 wakepin wakeup*/
{BIT_SYSON_WEVT_ADC_MSK, ON}, /* sleep: ADC Wakeup */
{BIT_SYSON_WEVT_SDIO_MSK, OFF}, /* sleep: SDIO Wakeup */
{BIT_SYSON_WEVT_RTC_MSK, ON}, /* dstandby: RTC Wakeup */
{BIT_SYSON_WEVT_UART1_MSK, ON}, /* sleep: UART1 Wakeup */
{BIT_SYSON_WEVT_UART0_MSK, ON}, /* sleep: UART0 Wakeup */
{BIT_SYSON_WEVT_I2C1_MSK, OFF}, /* sleep: I2C1 Wakeup */
{BIT_SYSON_WEVT_I2C0_MSK, OFF}, /* sleep: I2C0 Wakeup */
{BIT_SYSON_WEVT_WLAN_MSK, ON}, /* sleep: WLAN Wakeup */
{BIT_SYSON_WEVT_I2C1_ADDRMATCH_MSK, OFF}, /* sleep: I2C1 Slave RX address Wakeup */
{BIT_SYSON_WEVT_I2C0_ADDRMATCH_MSK, OFF}, /* sleep: I2C0 Slave RX address Wakeup */
{BIT_SYSON_WEVT_USB_MSK, OFF}, /* sleep: USB Wakeup */
{BIT_SYSON_WEVT_GPIO_MSK, ON}, /* sleep: GPIO Wakeup */
{BIT_SYSON_WEVT_OVER_CURRENT_MSK, OFF}, /* sleep: REGU OVER_CURRENT Wakeup */
{BIT_SYSON_WEVT_SYSTIM_MSK, ON}, /* dstandby: 250K SYS Timer(ANA Timer) Wakeup */
{0xFFFFFFFF, OFF}, /* Table end */
};
/* you should set BIT_SYSON_WEVT_GPIO_DSTBY_MSK ON if you use wakepin */
WAKEPIN_TypeDef sleep_wakepin_config[]=
{
// Module Status Polarity
{WAKUP_0, OFF, 0}, /* wakeup_0: GPIOA_18 */
{WAKUP_1, ON, 0}, /* wakeup_1: GPIOA_5 */
{WAKUP_2, OFF, 0}, /* wakeup_2: GPIOA_22 */
{WAKUP_3, OFF, 0}, /* wakeup_3: GPIOA_23 */
{0xFFFFFFFF, OFF, 0}, /* Table end */
};
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/

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lib/amb1_sdk/soc/realtek/8711b/fwlib/ram_lib/startup.c Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "ameba_soc.h"
#include "build_info.h"
#include "strproc.h"
#include "system_8195a.h"
// ROM symbols
extern void INT_HardFault(u32 HardDefaultArg);
extern void RTC_ClokSource(u32 Source);
extern void rtw_efuse_boot_write(void);
extern void APP_Start(void);
u32 random_seed = 0x0;
#if defined ( __ICCARM__ )
#pragma section=".ram_image2.bss"
#pragma section=".ram_image2.skb.bss"
#pragma section=".rom.bss"
#pragma section=".ram.start.table"
#pragma section=".ram_image1.bss"
#pragma section=".image2.start.table1"
#pragma section=".image2.start.table2"
u8* __bss_start__;
u8* __bss_end__;
void __iar_data_init_app(void)
{
__bss_start__ = (u8*)__section_begin(".ram_image2.bss");
__bss_end__ = (u8*)__section_end(".ram_image2.skb.bss");
}
#endif
extern VOID SOCPS_WakeFromPG(VOID);
#if defined ( __ICCARM__ ) || defined(__GNUC__)
IMAGE2_RAM_TEXT_SECTION
VOID
HalHardFaultHandler_user_define(u32 HardDefaultArg, u32 lr)
{
#if CONFIG_EXAMPLE_CM_BACKTRACE
cm_backtrace_fault(HardDefaultArg, lr);
#endif
}
IMAGE2_RAM_TEXT_SECTION
VOID
HalHardFaultHandler_Patch_c(u32 HardDefaultArg, u32 lr)
{
HalHardFaultHandler_user_define(HardDefaultArg, lr);
INT_HardFault(HardDefaultArg);
}
IMAGE2_RAM_TEXT_SECTION
VOID
HalHardFaultHandler_Patch_asm(void)
{
asm("TST LR, #4\n"
"ITE EQ\n"
"MRSEQ R0, MSP\n"
"MRSNE R0, PSP\n"
"MOV R1, LR\n"
"B HalHardFaultHandler_Patch_c");
}
#endif
// Override original Interrupt Vector Table
VOID BOOT_VectorTableOverride(u32 StackP)
{
// Override NMI Handler
//4 Initial NMI
//NewVectorTable[2] = (HAL_VECTOR_FUN)HalNMIHandler_Patch;
#if 0//defined ( __ICCARM__ ) || defined(__GNUC__)
//Redefine Hardfault Handler
NewVectorTable[3] = (HAL_VECTOR_FUN)HalHardFaultHandler_Patch_asm;
#endif
}
void BOOT_Reason(void)
{
u32 backup_reg0 = BKUP_Read(BKUP_REG0);
DBG_8195A("boot reason: %x \n", backup_reg0);
}
extern u32 GlobalDebugEnable;
VOID BOOT_InitDebugFlg(VOID)
{
SYSTEM_DATA *SysData = (SYSTEM_DATA *)(SPI_FLASH_BASE + FLASH_SYSTEM_DATA_ADDR);
/* reset */
ConfigDebugErr = 0;
ConfigDebugWarn = 0;
ConfigDebugInfo = 0;
#if (defined(CONFIG_POST_SIM) || defined(CONFIG_CP))
return;
#endif
/* to initial ROM code using global variable */
#ifdef CONFIG_DEBUG_ERR_MSG
ConfigDebugErr = 0xFFFFFFFF;//_DBG_MISC_;]
#endif
#ifdef CONFIG_DEBUG_WARN_MSG
ConfigDebugWarn = 0xFFFFFFFF;
#endif
#ifdef CONFIG_DEBUG_INFO_MSG
ConfigDebugInfo = 0xFFFFFFFF;
#endif
if (SysData->UlogDbgEn == 0x0) {
ConfigDebugErr = 0;
ConfigDebugWarn = 0;
ConfigDebugInfo = 0;
GlobalDebugEnable = 0;
}
}
VOID BOOT_RTC_Init(VOID)
{
RTC_InitTypeDef RTC_InitStruct_temp;
RTC_AlarmTypeDef RTC_AlarmStruct_temp;
RTC_TimeTypeDef RTC_TimeStruct;
/* for 32K more stable */
NCO32K_Init(32768, XTAL_ClkGet(), 15, 2);
RTC_ClokSource(0);
RTC_StructInit(&RTC_InitStruct_temp);
RTC_Init(&RTC_InitStruct_temp);
/* 32760 need add need add 15 cycles (256Hz) every 4 min*/
//RTC_SmoothCalibConfig(RTC_CalibSign_Positive, 15,
// RTC_CalibPeriod_4MIN, RTC_Calib_Enable);
/* set time when power on */
RTC_GetTime(RTC_Format_BIN, &RTC_TimeStruct);
if (RTC_TimeStruct.RTC_Seconds == 0 && RTC_TimeStruct.RTC_Minutes == 0) {
RTC_TimeStructInit(&RTC_TimeStruct);
RTC_SetTime(RTC_Format_BIN, &RTC_TimeStruct);
}
/* set alarm */
RTC_AlarmStructInit(&RTC_AlarmStruct_temp);
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Days = 1;
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Hours = 1;
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Minutes = 1;
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Seconds = 30;
RTC_AlarmStruct_temp.RTC_AlarmMask = RTC_AlarmMask_Hours | RTC_AlarmMask_Minutes;
RTC_AlarmStruct_temp.RTC_Alarm2Mask = RTC_Alarm2Mask_Days;
RTC_SetAlarm(RTC_Format_BIN, &RTC_AlarmStruct_temp);
RTC_AlarmCmd(DISABLE);
/* RTC interrupt hander is reserved for user */
//InterruptRegister((IRQ_FUN)BOOT_RTC_Handler, RTC_IRQ, NULL, 4);
//InterruptEn(RTC_IRQ, 4);
}
VOID BOOT_PlatformInit(VOID)
{
u32 Temp = 0;
/* Set SPS lower voltage */
//Temp = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG0)&0xf0ffffff)|0x6000000);
//HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG0, Temp);
/* Driving control of RF1 clock buffer, 11:large current, 00: small current */
Temp = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_XTAL_CTRL1);
Temp &= ~(BIT_SYS_XTAL_DRV_RF1(3));
Temp |= BIT_SYS_XTAL_DRV_RF1(1);
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_XTAL_CTRL1, Temp);
}
//3 Imgae 2
VOID BOOT_Image2(VOID)
{
int ret = 0;
u32 OSC8MCali = _SUCCESS;
#ifdef CONFIG_FPGA
MPU->RNR = 0; //0xE000ED00, 0x98 MPU Region RNRber Register
MPU->RBAR = 0; //0xE000ED00, 0x9C MPU Region Base Address Register
MPU->RASR = 0x6000027; //0xE000ED00, 0xA0 MPU Region Attribute and Size Register
MPU->CTRL = 7; //0xE000ED00, 0x94 MPU Control Register
#endif
#if defined ( __ICCARM__ )
__iar_data_init_app();
#endif
BOOT_InitDebugFlg();
BOOT_VectorTableOverride(0x1003EFFC);
/* set CPU clock if needed, default is 125MHz */
//CPU_ClkSet((u8)(CPU_CLOCK_SEL_VALUE));
//DelayUs(10);
#if (defined(CONFIG_CP))
CPTest_EnterImg2Ok();
#endif
DBG_8195A("===== Enter Image 2 ====\n");
//3 0) Vendor Config function
//4 Ram Bss Iitial
u32 BssLen = (__bss_end__ - __bss_start__);
_memset((void *) __bss_start__, 0, BssLen);
SystemCoreClockUpdate();
ret = boot_export_symbol.boot_system_init1();
//BOOT_PlatformInit();
OSC8M_CLOCK_GLB = 8388608;
#if (!defined(CONFIG_FPGA) && !defined(CONFIG_POST_SIM))
OSC8MCali = OSC8M_Calibration(DISABLE, OSC32K_CALI_32KCYC_064, OSC8M_8388608HZ);
DelayUs(90);
DelayUs(90);
#endif //CONFIG_FPGA
#ifdef CONFIG_CP
CPTest_OSCCalibrationOk();
#endif
/* Workaround for the GPIOA_7 didn't pull high: it may cause the
SDIO Device hardware be enabled automatically at power on and then
GPIOA[7:0] will be used for SDIO device */
#ifndef CONFIG_SDIO_DEVICE_EN
// SDIO Pin Mux off
SDIOD_PIN_FCTRL(OFF);
#endif
DBG_8195A("OSC8M: %d \n", OSC8M_Get());
BOOT_Reason();
BOOT_RTC_Init();
#if (!defined(CONFIG_FPGA))
if (SYSCFG0_BDOption() != SYSCFG_BD_QFN48_MCM_8MBFlash) {
random_seed = Gen_RandomSeed();
}
#endif
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
rtw_efuse_boot_write();
#endif
ret = boot_export_symbol.boot_system_init2();
APP_Start();
#if defined ( __ICCARM__ )
// it is dummy code, but IAR linker need this
__iar_data_init3();
#endif
}
IMAGE2_VALID_PATTEN_SECTION
const u8 RAM_IMG2_VALID_PATTEN[20] = {
'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
(FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
(FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff),
(FW_CHIP_ID&0xff), ((FW_CHIP_ID >> 8)&0xff),
(FW_CHIP_VER),
(FW_BUS_TYPE),
(FW_INFO_RSV1),
(FW_INFO_RSV2),
(FW_INFO_RSV3),
(FW_INFO_RSV4)
};
IMAGE2_ENTRY_SECTION
RAM_START_FUNCTION gImage2EntryFun0 = {
BOOT_Image2,
SOCPS_WakeFromPG
};