clean up header file

This commit is contained in:
2025-11-09 21:08:08 +06:00
parent fd3d66e424
commit 7877bb42f4
3 changed files with 55 additions and 31 deletions

View File

@@ -40,6 +40,7 @@
"__config": "c", "__config": "c",
"string": "c", "string": "c",
"atomic": "c", "atomic": "c",
"__bit_reference": "c" "__bit_reference": "c",
"err.h": "c"
} }
} }

View File

@@ -13,12 +13,6 @@
#define IFNAME0 'e' #define IFNAME0 'e'
#define IFNAME1 'n' #define IFNAME1 'n'
#define ETH_RX_BUF_COUNT 4
#define ETH_TX_BUF_COUNT 2
/* buf size should be at least ETH_MAX_PACKET_SIZE */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE
typedef struct { typedef struct {
volatile uint32_t head; // producer idx: next free slot to write to volatile uint32_t head; // producer idx: next free slot to write to
volatile uint32_t tail; // consumer idx: next slot to be txed volatile uint32_t tail; // consumer idx: next slot to be txed
@@ -216,12 +210,10 @@ static err_t low_level_output(struct netif* netif, struct pbuf* p) {
} }
g_dma_tx_descs[current_idx].Status = len; g_dma_tx_descs[current_idx].Status = len;
tx_queue_produce(&ethernetif->tx_q); tx_queue_produce(&ethernetif->tx_q);
} }
tx_start_if_possible(); tx_start_if_possible();
return errval; return errval;
} }
@@ -310,7 +302,8 @@ void ETH_IRQHandler(void) {
ethernetif->rx_desc_head->Status &= ~ETH_DMARxDesc_OWN; ethernetif->rx_desc_head->Status &= ~ETH_DMARxDesc_OWN;
// write packet len into status field for CPU // write packet len into status field for CPU
ethernetif->rx_desc_head->Status |= ethernetif->rx_desc_head->Status |=
(ETH_DMARxDesc_FS | ETH_DMARxDesc_LS | (ETH10M->ERXLN << 16)); (ETH_DMARxDesc_FS | ETH_DMARxDesc_LS |
(ETH10M->ERXLN << ETH_DMARxDesc_FrameLengthShift));
// advance descripotor ptr // advance descripotor ptr
ethernetif->rx_desc_head = next_desc; ethernetif->rx_desc_head = next_desc;
// re-arm receiver with new emtpy buf // re-arm receiver with new emtpy buf

View File

@@ -4,25 +4,32 @@
#include "lwip/err.h" #include "lwip/err.h"
#include "lwip/netif.h" #include "lwip/netif.h"
void phy_write_reg(uint8_t reg_add, uint16_t reg_val); /* Unique device ID */
uint16_t phy_read_reg(uint8_t reg_add);
#define ROM_CFG_USERADR_ID 0x1FFFF7E8 #define ROM_CFG_USERADR_ID 0x1FFFF7E8
#define ETH_DMARxDesc_FrameLengthShift 16 /* Ethernet Frame Size Definitions */
#define ETH_MAX_PACKET_SIZE \
1536 /* ETH_HEADER + VLAN_TAG + MAX_ETH_PAYLOAD + ETH_CRC */
#define ETH_HEADER \ #define ETH_HEADER \
14 /* 6 byte Dest addr, 6 byte Src addr, 2 byte length/type \ 14 /* 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
*/
#define ETH_CRC 4 /* Ethernet CRC */ #define ETH_CRC 4 /* Ethernet CRC */
#define ETH_EXTRA 2 /* Extra bytes in some cases */ #define ETH_EXTRA 2 /* Extra bytes in some cases */
#define VLAN_TAG 4 /* optional 802.1q VLAN Tag */ #define VLAN_TAG 4 /* optional 802.1q VLAN Tag */
#define MIN_ETH_PAYLOAD 46 /* Minimum Ethernet payload size */ #define MIN_ETH_PAYLOAD 46 /* Minimum Ethernet payload size */
#define MAX_ETH_PAYLOAD 1500 /* Maximum Ethernet payload size */ #define MAX_ETH_PAYLOAD 1500 /* Maximum Ethernet payload size */
#define ETH_MAX_PACKET_SIZE \
1536 /* ETH_HEADER + VLAN_TAG + MAX_ETH_PAYLOAD + ETH_CRC */
#define MIN_ETH_FRAME_SIZE (ETH_HEADER + MIN_ETH_PAYLOAD) /* 60 bytes */ #define MIN_ETH_FRAME_SIZE (ETH_HEADER + MIN_ETH_PAYLOAD) /* 60 bytes */
/* Buffer Configuration */
#define ETH_RX_BUF_COUNT 4
#define ETH_TX_BUF_COUNT 2
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE
/* DMA descriptor stuff */
#define ETH_DMARxDesc_FrameLengthShift 16
typedef struct { typedef struct {
uint32_t volatile Status; /* Status */ uint32_t volatile Status; /* Status */
uint32_t ControlBufferSize; /* Control and Buffer1, Buffer2 lengths */ uint32_t ControlBufferSize; /* Control and Buffer1, Buffer2 lengths */
@@ -31,29 +38,52 @@ typedef struct {
} ETH_DMADESCTypeDef; } ETH_DMADESCTypeDef;
/** /**
* @brief Initialize the ethernet interface and lwIP network stack. * Should be called at the beginning of the program to set up the
* This function should be passed as the init function to netif_add(). * network interface. It calls the function low_level_init() to do the
* actual setup of the hardware.
* *
* @param netif The lwIP network interface structure to be initialized. * This function should be passed as a parameter to netif_add().
* @return ERR_OK if the loopif is initialized, ERR_MEM if private data couldn't *
* be allocated. * @param netif the lwip network interface structure for this ethernetif
* @return ERR_OK if the loopif is initialized
* ERR_MEM if private data couldn't be allocated
* any other err_t on error
*/ */
err_t ethernetif_init(struct netif* netif); err_t ethernetif_init(struct netif* netif);
/** /**
* @brief This function should be called periodically from your main loop * This function should be called when a packet is ready to be read
* to check for incoming packets and pass them to lwIP. * from the interface. It uses the function low_level_input() that
* should handle the actual reception of bytes from the network
* interface. Then the type of the received packet is determined and
* the appropriate input function is called.
* *
* @param netif The lwIP network interface structure. * @param netif the lwip network interface structure for this ethernetif
*/ */
void ethernetif_input(struct netif* netif); void ethernetif_input(struct netif* netif);
/** /**
* @brief This function should be called periodically from your main loop * This function should be called periodically from the main loop
* to check the link status and update lwIP accordingly. * to check the link status and update lwIP accordingly.
* *
* @param netif The lwIP network interface structure.. * @param netif the lwip network interface structure for this ethernetif
*/ */
void ethernetif_link_poll(struct netif* netif); void ethernetif_link_poll(struct netif* netif);
/**
* Write a value to PHY register.
*
* @param reg_add PHY register address.
* @param reg_val Value to write.
*/
void phy_write_reg(uint8_t reg_add, uint16_t reg_val);
/**
* Read a value from PHY register.
*
* @param reg_add PHY register address.
* @return Register value.
*/
uint16_t phy_read_reg(uint8_t reg_add);
#endif /* __ETHERNETIF_H */ #endif /* __ETHERNETIF_H */