ch585-dev

ch585_dev/ch585_dev.kicad_dru

@@ -0,0 +1,227 @@
+(version 1)
+# Custom Design Rules (DRC) for KiCAD 8.0 (Stored in '<project>.kicad_dru' file).
+#
+# Matching JLCPCB capabilities: https://jlcpcb.com/capabilities/pcb-capabilities
+#
+# KiCad documentation: https://docs.kicad.org/master/id/pcbnew/pcbnew_advanced.html#custom_design_rules
+#
+# Inspiration
+# - https://gist.github.com/darkxst/f713268e5469645425eed40115fb8b49 (with comments)
+# - https://gist.github.com/denniskupec/e163d13b0a64c2044bd259f64659485e (with comments)
+
+# TODO new rule: NPTH pads.
+# Inner diameter of pad should be 0.4-0.5 mm larger than NPTH drill diameter.
+# JLCPCB: "We make NPTH via dry sealing film process, if customer would like a NPTH but around with pad/copper, our engineer will dig out around pad/copper about 0.2mm-0.25mm, otherwise the metal potion will be flowed into the hole and it becomes a PTH. (there will be no copper dig out optimization for single board)."
+
+# TODO: new rule for plated slots: min diameter/width 0.5mm
+# JLCPCB: "The minimum plated slot width is 0.5mm, which is drawn with a pad."
+
+# TODO new rule: non-plated slots: min diameter/width 1.0mm
+# JLCPCB: "The minimum Non-Plated Slot Width is 1.0mm, please draw the slot outline in the mechanical layer(GML or GKO)""
+
+
+# --- Drill/Hole Size ---
+
+(rule "JLCPCB: Drill Hole Size"
+  # Choose between:
+  # 1-2 Layers
+	# (constraint hole_size (min 0.3mm) (max 6.3mm))
+  # 4-6 Layers (more costly)
+	# (constraint hole_size (min 0.15mm) (max 6.3mm))
+  # 4-6 Layers (preferred)
+	(constraint hole_size (min 0.2mm) (max 6.3mm))
+)
+
+(rule "JLCPCB: Via Hole Size"
+	(condition "A.Type == 'Via'")
+  # Choose between:
+  # 1-2 Layers
+	# (constraint hole_size (min 0.3mm))
+  # 4-6 Layers (more costly)
+  # (constraint hole_size (min 0.15mm))
+  # 4-6 Layers (preferred)
+	(constraint hole_size (min 0.2mm))
+)
+
+(rule "JLCPCB: Via Annular Ring"
+	(condition "A.Type == 'Via'")
+  # Choose between:
+  # 1-6 Layers
+  # (constraint annular_width (min 0.05mm))
+  # 1-6 Layers (preferred)
+	(constraint annular_width (min 0.075mm))
+)
+
+(rule "JLCPCB: PTH Hole Size"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated()")
+	(constraint hole_size (min 0.2mm) (max 6.3mm))
+)
+
+(rule "JLCPCB: NPTH Hole Size"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical' && !A.isPlated()")
+	(constraint hole_size (min 0.5mm))
+)
+
+# TODO: Hole to board edge ≥ 1 mm. Min. board size 10 × 10 mm.
+(rule "JLCPCB: Castellated Hole Size"
+	(layer outer)
+	(condition "A.Type == 'Pad' && A.Fabrication_Property == 'Castellated pad'")
+	(constraint hole_size (min 0.6mm))
+)
+
+(rule "JLCPCB: PTH Annular Ring"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated()")
+	(constraint annular_width (min 0.075mm))
+)
+
+(rule "JLCPCB: NPTH Annular Ring"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical' && !A.isPlated()")
+	(constraint annular_width (min 0.25mm))
+)
+
+# An expensive 4-Wire Kelvin Test is automatically added for holes that are < 0.3mm with a diameter ≤ 0.4mm.
+(rule "JLCPCB: Avoid 4-Wire Kelvin Test"
+	(condition "(A.Type == 'Via' && A.Hole < 0.3mm && A.Diameter <= 0.4mm) || (A.Type == 'Pad' && ((A.Hole_Size_X < 0.3mm && A.Size_X <= 0.4mm) || (A.Hole_Size_Y < 0.3mm && A.Size_Y <= 0.4mm)))")
+  # 4-6 Layers
+  (constraint annular_width (min 0.125mm))
+)
+
+
+# --- VIA Support Rules --- 
+
+(rule "JLCPCB: Only Throughhole VIAs are supported" 
+	(condition "A.Type == 'Via'")
+	(constraint assertion "!(A.isBlindBuriedVia() || A.isMicroVia())")
+)
+
+
+# --- Minimum Clearance ---
+
+(rule "JLCPCB: Hole to Hole Clearance (Different Nets)"
+	(condition "A.Net != B.Net")
+	(constraint hole_to_hole (min 0.5mm))
+)
+
+(rule "JLCPCB: Via Hole to Via Hole Clearance (Same Net)"
+	(condition "A.Type == 'Via' && B.Type == 'Via' && A.Net == B.Net")
+	(constraint hole_to_hole (min 0.254mm))
+)
+
+(rule "JLCPCB: Pad to Pad Clearance (Pad without Hole, Different Nets)"
+	(condition "A.Type == 'Pad' && (A.Pad_Type != 'Through-hole' && A.Pad_Type != 'NPTH, mechanical') && B.Type == 'Pad' && (B.Pad_Type != 'Through-hole' && B.Pad_Type != 'NPTH, mechanical') && A.Net != B.Net")
+	(constraint clearance (min 0.127mm))
+)
+
+(rule "JLCPCB: Pad Hole to Pad Hole Clearance (Pad with Hole, Different Nets)"
+	(condition "A.Type == 'Pad' && (A.Pad_Type == 'Through-hole' || A.Pad_Type == 'NPTH, mechanical') && B.Type == 'Pad' && (B.Pad_Type == 'Through-hole' || B.Pad_Type == 'NPTH, mechanical') && A.Net != B.Net")
+	(constraint hole_to_hole (min 0.5mm))
+)
+
+# NOTE: This is not stated specifically, but is implied by other rules.
+(rule "JLCPCB: Via/Pad to Via/Pad Clearance (Different Nets)"
+	(condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net != B.Net")
+	(constraint clearance (min 0.127mm))
+)
+
+# NOTE: This is not stated specifically, but is implied by other rules.
+(rule "JLCPCB: Via/Pad Hole to Via/Pad Hole Clearance (Same Net)"
+	(condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net == B.Net")
+	(constraint hole_to_hole (min 0.254mm))
+)
+
+(rule "JLCPCB: Via to Trace"
+	(condition "A.Type == 'Via' && B.Type == 'Track'")
+	(constraint hole_clearance (min 0.254mm))
+)
+
+(rule "JLCPCB: PTH to Trace"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated() && B.Type == 'Track'")
+	(constraint hole_clearance (min 0.33mm))
+)
+
+(rule "JLCPCB: NPTH to Trace"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical' && !A.isPlated() && B.Type == 'Track'")
+	(constraint hole_clearance (min 0.254mm))
+)
+
+(rule "JLCPCB: Pad to Trace"
+	(condition "A.Type == 'Pad' && (A.Pad_Type == 'Through-hole' || A.Pad_Type == 'NPTH, mechanical') && B.Type == 'Track' &&  A.Net != B.Net")
+	(constraint clearance (min 0.2mm))
+)
+
+
+# --- Minimum Trace Width and Spacing ---
+
+(rule "JLCPCB: Trace Width (Outer Layer)"
+	(layer outer)
+	(condition "A.Type == 'Track'")
+  # Choose between:
+  # 1-2 Layers (1oz)
+  # (constraint track_width (min 0.127mm))
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint track_width (min 0.09mm))
+  # 1-6 Layers (2oz)
+  # (constraint track_width (min 0.2mm))
+)
+(rule "JLCPCB: Trace Spacing (Outer Layer)"
+	(layer outer)
+	(condition "A.Type == 'Track' && B.Type == 'Track'")
+  # Choose between:
+  # 1-2 Layers (1oz)
+  # (constraint clearance (min 0.127mm))
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint clearance (min 0.09mm))
+  # 1-6 Layers (2oz)
+  # (constraint clearance (min 0.2mm))
+)
+
+(rule "JLCPCB: Trace Width (Inner Layer)"
+	(layer inner)
+	(condition "A.Type == 'Track'")
+  # Choose between:
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint track_width (min 0.09mm))
+  # 4-6 Layers (2oz)
+  # (constraint track_width (min 0.2mm))
+)
+(rule "JLCPCB: Trace Spacing (Inner Layer)"
+	(layer inner)
+	(condition "A.Type == 'Track' && B.Type == 'Track'")
+  # Choose between:
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint clearance (min 0.09mm))
+  # 4-6 Layers (2oz)
+  # (constraint clearance (min 0.2mm))
+)
+
+
+# --- Legend ---
+
+(rule "JLCPCB: Minimum Line Width"
+	(layer "?.Silkscreen")
+	(condition "A.Type == 'Text' || A.Type == 'Text Box'")
+	(constraint text_thickness (min 0.15mm))
+)
+
+(rule "JLCPCB: Minimum Text Height"
+	(layer "?.Silkscreen")
+	(condition "A.Type == 'Text' || A.Type == 'Text Box'")
+	(constraint text_height (min 1mm))
+)
+
+(rule "JLCPCB: Pad to Silkscreen"
+	(condition "A.Type == 'Pad' && ((A.existsOnLayer('F.Mask') && B.Layer == 'F.Silkscreen') || (A.existsOnLayer('B.Mask') && B.Layer == 'B.Silkscreen')) ")
+	(constraint silk_clearance (min 0.15mm))
+)
+
+
+# --- Board Outlines ---
+
+(rule "JLCPCB: Trace to Board Edge"
+	(condition "A.Type == 'Track'")
+  # Choose between:
+  # Routed
+	(constraint edge_clearance (min 0.3mm))
+  # V-Cut Panel
+	# (constraint edge_clearance (min 0.4mm))
+)

ch585_dev/ch585_dev.kicad_prl

@@ -0,0 +1,131 @@
+{
+  "board": {
+    "active_layer": 0,
+    "active_layer_preset": "",
+    "auto_track_width": true,
+    "hidden_netclasses": [],
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "images": 0.6,
+      "pads": 1.0,
+      "shapes": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      "vias",
+      "footprint_text",
+      "footprint_anchors",
+      "ratsnest",
+      "grid",
+      "footprints_front",
+      "footprints_back",
+      "footprint_values",
+      "footprint_references",
+      "tracks",
+      "drc_errors",
+      "drawing_sheet",
+      "bitmaps",
+      "pads",
+      "zones",
+      "drc_warnings",
+      "drc_exclusions",
+      "locked_item_shadows",
+      "conflict_shadows",
+      "shapes"
+    ],
+    "visible_layers": "ffffffff_ffffffff_fffffff5_ffffffff",
+    "zone_display_mode": 0
+  },
+  "git": {
+    "repo_type": "",
+    "repo_username": "",
+    "ssh_key": ""
+  },
+  "meta": {
+    "filename": "ch585_dev.kicad_prl",
+    "version": 5
+  },
+  "net_inspector_panel": {
+    "col_hidden": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "col_order": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      6,
+      7,
+      8,
+      9
+    ],
+    "col_widths": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "custom_group_rules": [],
+    "expanded_rows": [],
+    "filter_by_net_name": true,
+    "filter_by_netclass": true,
+    "filter_text": "",
+    "group_by_constraint": false,
+    "group_by_netclass": false,
+    "show_unconnected_nets": false,
+    "show_zero_pad_nets": false,
+    "sort_ascending": true,
+    "sorting_column": 0
+  },
+  "open_jobsets": [],
+  "project": {
+    "files": []
+  },
+  "schematic": {
+    "selection_filter": {
+      "graphics": true,
+      "images": true,
+      "labels": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pins": true,
+      "symbols": true,
+      "text": true,
+      "wires": true
+    }
+  }
+}

ch585_dev/ch585_dev.kicad_pro

@@ -0,0 +1,656 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "apply_defaults_to_fp_fields": false,
+        "apply_defaults_to_fp_shapes": false,
+        "apply_defaults_to_fp_text": false,
+        "board_outline_line_width": 0.05,
+        "copper_line_width": 0.2,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.05,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": true,
+          "text_position": 0,
+          "units_format": 0
+        },
+        "fab_line_width": 0.1,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.1,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.0,
+          "height": 0.5,
+          "width": 1.0
+        },
+        "silk_line_width": 0.1,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.1,
+        "silk_text_upright": false,
+        "zones": {
+          "min_clearance": 0.15
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        },
+        {
+          "gap": 0.2,
+          "via_gap": 0.0,
+          "width": 0.2
+        }
+      ],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
+        "courtyards_overlap": "warning",
+        "creepage": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "warning",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint": "error",
+        "footprint_filters_mismatch": "ignore",
+        "footprint_symbol_mismatch": "warning",
+        "footprint_type_mismatch": "ignore",
+        "hole_clearance": "error",
+        "hole_to_hole": "warning",
+        "holes_co_located": "warning",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "warning",
+        "lib_footprint_mismatch": "warning",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "mirrored_text_on_front_layer": "warning",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "nonmirrored_text_on_back_layer": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "warning",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "warning",
+        "silk_edge_clearance": "warning",
+        "silk_over_copper": "warning",
+        "silk_overlap": "ignore",
+        "skew_out_of_range": "error",
+        "solder_mask_bridge": "warning",
+        "starved_thermal": "error",
+        "text_height": "ignore",
+        "text_on_edge_cuts": "error",
+        "text_thickness": "ignore",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_angle": "error",
+        "track_dangling": "warning",
+        "track_segment_length": "error",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "ignore",
+        "via_dangling": "warning",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_connection": 0.0,
+        "min_copper_edge_clearance": 0.3,
+        "min_groove_width": 0.0,
+        "min_hole_clearance": 0.2,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.2,
+        "min_microvia_drill": 0.1,
+        "min_resolved_spokes": 2,
+        "min_silk_clearance": 0.0,
+        "min_text_height": 0.8,
+        "min_text_thickness": 0.08,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.1,
+        "min_via_annular_width": 0.1,
+        "min_via_diameter": 0.3,
+        "solder_mask_to_copper_clearance": 0.005,
+        "use_height_for_length_calcs": true
+      },
+      "teardrop_options": [
+        {
+          "td_onpthpad": true,
+          "td_onroundshapesonly": false,
+          "td_onsmdpad": true,
+          "td_ontrackend": true,
+          "td_onvia": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 1,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 1,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 1,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_track_end",
+          "td_width_to_size_filter_ratio": 0.9
+        }
+      ],
+      "track_widths": [
+        0.0,
+        0.16,
+        0.2,
+        0.25,
+        0.3,
+        0.5,
+        0.6,
+        0.8,
+        0.9,
+        1.0,
+        1.2,
+        1.3
+      ],
+      "tuning_pattern_settings": {
+        "diff_pair_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 1.0
+        },
+        "diff_pair_skew_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 0.6
+        },
+        "single_track_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 0.6
+        }
+      },
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.5,
+          "drill": 0.3
+        }
+      ],
+      "zones_allow_external_fillets": false
+    },
+    "ipc2581": {
+      "dist": "",
+      "distpn": "",
+      "internal_id": "",
+      "mfg": "",
+      "mpn": ""
+    },
+    "layer_pairs": [],
+    "layer_presets": [],
+    "viewports": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "endpoint_off_grid": "warning",
+      "extra_units": "error",
+      "footprint_filter": "ignore",
+      "footprint_link_issues": "warning",
+      "four_way_junction": "ignore",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "label_multiple_wires": "warning",
+      "lib_symbol_issues": "warning",
+      "lib_symbol_mismatch": "warning",
+      "missing_bidi_pin": "warning",
+      "missing_input_pin": "warning",
+      "missing_power_pin": "error",
+      "missing_unit": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "same_local_global_label": "warning",
+      "similar_label_and_power": "warning",
+      "similar_labels": "warning",
+      "similar_power": "warning",
+      "simulation_model_issue": "ignore",
+      "single_global_label": "ignore",
+      "unannotated": "error",
+      "unconnected_wire_endpoint": "warning",
+      "undefined_netclass": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": [
+      "mhardware"
+    ]
+  },
+  "meta": {
+    "filename": "ch585_dev.kicad_pro",
+    "version": 3
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12,
+        "clearance": 0.15,
+        "diff_pair_gap": 0.2,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 2147483647,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.16,
+        "via_diameter": 0.5,
+        "via_drill": 0.3,
+        "wire_width": 6
+      }
+    ],
+    "meta": {
+      "version": 4
+    },
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": []
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "plot": "out/",
+      "pos_files": "",
+      "specctra_dsn": "",
+      "step": "ch585_dev.step",
+      "svg": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "bom_export_filename": "${PROJECTNAME}.csv",
+    "bom_fmt_presets": [],
+    "bom_fmt_settings": {
+      "field_delimiter": ",",
+      "keep_line_breaks": false,
+      "keep_tabs": false,
+      "name": "CSV",
+      "ref_delimiter": ",",
+      "ref_range_delimiter": "",
+      "string_delimiter": "\""
+    },
+    "bom_presets": [],
+    "bom_settings": {
+      "exclude_dnp": false,
+      "fields_ordered": [
+        {
+          "group_by": false,
+          "label": "Reference",
+          "name": "Reference",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Qty",
+          "name": "${QUANTITY}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Value",
+          "name": "Value",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "DNP",
+          "name": "${DNP}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from BOM",
+          "name": "${EXCLUDE_FROM_BOM}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from Board",
+          "name": "${EXCLUDE_FROM_BOARD}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Footprint",
+          "name": "Footprint",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Datasheet",
+          "name": "Datasheet",
+          "show": true
+        }
+      ],
+      "filter_string": "",
+      "group_symbols": true,
+      "include_excluded_from_bom": true,
+      "name": "Default Editing",
+      "sort_asc": true,
+      "sort_field": "Reference"
+    },
+    "connection_grid_size": 50.0,
+    "drawing": {
+      "dashed_lines_dash_length_ratio": 12.0,
+      "dashed_lines_gap_length_ratio": 3.0,
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "operating_point_overlay_i_precision": 3,
+      "operating_point_overlay_i_range": "~A",
+      "operating_point_overlay_v_precision": 3,
+      "operating_point_overlay_v_range": "~V",
+      "overbar_offset_ratio": 1.23,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "",
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "space_save_all_events": true,
+    "spice_current_sheet_as_root": false,
+    "spice_external_command": "spice \"%I\"",
+    "spice_model_current_sheet_as_root": true,
+    "spice_save_all_currents": false,
+    "spice_save_all_dissipations": false,
+    "spice_save_all_voltages": false,
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "d907c913-5637-48db-a531-d06caa7527b7",
+      "Root"
+    ]
+  ],
+  "text_variables": {
+    "SHEETTOTAL": "1"
+  }
+}

ch585_dev/ch585_dev.round-tracks-config

@@ -0,0 +1,2 @@
+Default	True	2.0	3
+False	True	False

ch585_dev/ch585_dev_revb_1.kicad_dru

@@ -0,0 +1,227 @@
+(version 1)
+# Custom Design Rules (DRC) for KiCAD 8.0 (Stored in '<project>.kicad_dru' file).
+#
+# Matching JLCPCB capabilities: https://jlcpcb.com/capabilities/pcb-capabilities
+#
+# KiCad documentation: https://docs.kicad.org/master/id/pcbnew/pcbnew_advanced.html#custom_design_rules
+#
+# Inspiration
+# - https://gist.github.com/darkxst/f713268e5469645425eed40115fb8b49 (with comments)
+# - https://gist.github.com/denniskupec/e163d13b0a64c2044bd259f64659485e (with comments)
+
+# TODO new rule: NPTH pads.
+# Inner diameter of pad should be 0.4-0.5 mm larger than NPTH drill diameter.
+# JLCPCB: "We make NPTH via dry sealing film process, if customer would like a NPTH but around with pad/copper, our engineer will dig out around pad/copper about 0.2mm-0.25mm, otherwise the metal potion will be flowed into the hole and it becomes a PTH. (there will be no copper dig out optimization for single board)."
+
+# TODO: new rule for plated slots: min diameter/width 0.5mm
+# JLCPCB: "The minimum plated slot width is 0.5mm, which is drawn with a pad."
+
+# TODO new rule: non-plated slots: min diameter/width 1.0mm
+# JLCPCB: "The minimum Non-Plated Slot Width is 1.0mm, please draw the slot outline in the mechanical layer(GML or GKO)""
+
+
+# --- Drill/Hole Size ---
+
+(rule "JLCPCB: Drill Hole Size"
+  # Choose between:
+  # 1-2 Layers
+	# (constraint hole_size (min 0.3mm) (max 6.3mm))
+  # 4-6 Layers (more costly)
+	# (constraint hole_size (min 0.15mm) (max 6.3mm))
+  # 4-6 Layers (preferred)
+	(constraint hole_size (min 0.2mm) (max 6.3mm))
+)
+
+(rule "JLCPCB: Via Hole Size"
+	(condition "A.Type == 'Via'")
+  # Choose between:
+  # 1-2 Layers
+	# (constraint hole_size (min 0.3mm))
+  # 4-6 Layers (more costly)
+  # (constraint hole_size (min 0.15mm))
+  # 4-6 Layers (preferred)
+	(constraint hole_size (min 0.2mm))
+)
+
+(rule "JLCPCB: Via Annular Ring"
+	(condition "A.Type == 'Via'")
+  # Choose between:
+  # 1-6 Layers
+  # (constraint annular_width (min 0.05mm))
+  # 1-6 Layers (preferred)
+	(constraint annular_width (min 0.075mm))
+)
+
+(rule "JLCPCB: PTH Hole Size"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated()")
+	(constraint hole_size (min 0.2mm) (max 6.3mm))
+)
+
+(rule "JLCPCB: NPTH Hole Size"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical' && !A.isPlated()")
+	(constraint hole_size (min 0.5mm))
+)
+
+# TODO: Hole to board edge ≥ 1 mm. Min. board size 10 × 10 mm.
+(rule "JLCPCB: Castellated Hole Size"
+	(layer outer)
+	(condition "A.Type == 'Pad' && A.Fabrication_Property == 'Castellated pad'")
+	(constraint hole_size (min 0.6mm))
+)
+
+(rule "JLCPCB: PTH Annular Ring"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated()")
+	(constraint annular_width (min 0.075mm))
+)
+
+(rule "JLCPCB: NPTH Annular Ring"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical' && !A.isPlated()")
+	(constraint annular_width (min 0.25mm))
+)
+
+# An expensive 4-Wire Kelvin Test is automatically added for holes that are < 0.3mm with a diameter ≤ 0.4mm.
+(rule "JLCPCB: Avoid 4-Wire Kelvin Test"
+	(condition "(A.Type == 'Via' && A.Hole < 0.3mm && A.Diameter <= 0.4mm) || (A.Type == 'Pad' && ((A.Hole_Size_X < 0.3mm && A.Size_X <= 0.4mm) || (A.Hole_Size_Y < 0.3mm && A.Size_Y <= 0.4mm)))")
+  # 4-6 Layers
+  (constraint annular_width (min 0.125mm))
+)
+
+
+# --- VIA Support Rules --- 
+
+(rule "JLCPCB: Only Throughhole VIAs are supported" 
+	(condition "A.Type == 'Via'")
+	(constraint assertion "!(A.isBlindBuriedVia() || A.isMicroVia())")
+)
+
+
+# --- Minimum Clearance ---
+
+(rule "JLCPCB: Hole to Hole Clearance (Different Nets)"
+	(condition "A.Net != B.Net")
+	(constraint hole_to_hole (min 0.5mm))
+)
+
+(rule "JLCPCB: Via Hole to Via Hole Clearance (Same Net)"
+	(condition "A.Type == 'Via' && B.Type == 'Via' && A.Net == B.Net")
+	(constraint hole_to_hole (min 0.254mm))
+)
+
+(rule "JLCPCB: Pad to Pad Clearance (Pad without Hole, Different Nets)"
+	(condition "A.Type == 'Pad' && (A.Pad_Type != 'Through-hole' && A.Pad_Type != 'NPTH, mechanical') && B.Type == 'Pad' && (B.Pad_Type != 'Through-hole' && B.Pad_Type != 'NPTH, mechanical') && A.Net != B.Net")
+	(constraint clearance (min 0.127mm))
+)
+
+(rule "JLCPCB: Pad Hole to Pad Hole Clearance (Pad with Hole, Different Nets)"
+	(condition "A.Type == 'Pad' && (A.Pad_Type == 'Through-hole' || A.Pad_Type == 'NPTH, mechanical') && B.Type == 'Pad' && (B.Pad_Type == 'Through-hole' || B.Pad_Type == 'NPTH, mechanical') && A.Net != B.Net")
+	(constraint hole_to_hole (min 0.5mm))
+)
+
+# NOTE: This is not stated specifically, but is implied by other rules.
+(rule "JLCPCB: Via/Pad to Via/Pad Clearance (Different Nets)"
+	(condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net != B.Net")
+	(constraint clearance (min 0.127mm))
+)
+
+# NOTE: This is not stated specifically, but is implied by other rules.
+(rule "JLCPCB: Via/Pad Hole to Via/Pad Hole Clearance (Same Net)"
+	(condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net == B.Net")
+	(constraint hole_to_hole (min 0.254mm))
+)
+
+(rule "JLCPCB: Via to Trace"
+	(condition "A.Type == 'Via' && B.Type == 'Track'")
+	(constraint hole_clearance (min 0.254mm))
+)
+
+(rule "JLCPCB: PTH to Trace"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated() && B.Type == 'Track'")
+	(constraint hole_clearance (min 0.33mm))
+)
+
+(rule "JLCPCB: NPTH to Trace"
+	(condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical' && !A.isPlated() && B.Type == 'Track'")
+	(constraint hole_clearance (min 0.254mm))
+)
+
+(rule "JLCPCB: Pad to Trace"
+	(condition "A.Type == 'Pad' && (A.Pad_Type == 'Through-hole' || A.Pad_Type == 'NPTH, mechanical') && B.Type == 'Track' &&  A.Net != B.Net")
+	(constraint clearance (min 0.2mm))
+)
+
+
+# --- Minimum Trace Width and Spacing ---
+
+(rule "JLCPCB: Trace Width (Outer Layer)"
+	(layer outer)
+	(condition "A.Type == 'Track'")
+  # Choose between:
+  # 1-2 Layers (1oz)
+  # (constraint track_width (min 0.127mm))
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint track_width (min 0.09mm))
+  # 1-6 Layers (2oz)
+  # (constraint track_width (min 0.2mm))
+)
+(rule "JLCPCB: Trace Spacing (Outer Layer)"
+	(layer outer)
+	(condition "A.Type == 'Track' && B.Type == 'Track'")
+  # Choose between:
+  # 1-2 Layers (1oz)
+  # (constraint clearance (min 0.127mm))
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint clearance (min 0.09mm))
+  # 1-6 Layers (2oz)
+  # (constraint clearance (min 0.2mm))
+)
+
+(rule "JLCPCB: Trace Width (Inner Layer)"
+	(layer inner)
+	(condition "A.Type == 'Track'")
+  # Choose between:
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint track_width (min 0.09mm))
+  # 4-6 Layers (2oz)
+  # (constraint track_width (min 0.2mm))
+)
+(rule "JLCPCB: Trace Spacing (Inner Layer)"
+	(layer inner)
+	(condition "A.Type == 'Track' && B.Type == 'Track'")
+  # Choose between:
+  # 4-6 Layers (1oz and 0.5oz)
+	(constraint clearance (min 0.09mm))
+  # 4-6 Layers (2oz)
+  # (constraint clearance (min 0.2mm))
+)
+
+
+# --- Legend ---
+
+(rule "JLCPCB: Minimum Line Width"
+	(layer "?.Silkscreen")
+	(condition "A.Type == 'Text' || A.Type == 'Text Box'")
+	(constraint text_thickness (min 0.15mm))
+)
+
+(rule "JLCPCB: Minimum Text Height"
+	(layer "?.Silkscreen")
+	(condition "A.Type == 'Text' || A.Type == 'Text Box'")
+	(constraint text_height (min 1mm))
+)
+
+(rule "JLCPCB: Pad to Silkscreen"
+	(condition "A.Type == 'Pad' && ((A.existsOnLayer('F.Mask') && B.Layer == 'F.Silkscreen') || (A.existsOnLayer('B.Mask') && B.Layer == 'B.Silkscreen')) ")
+	(constraint silk_clearance (min 0.15mm))
+)
+
+
+# --- Board Outlines ---
+
+(rule "JLCPCB: Trace to Board Edge"
+	(condition "A.Type == 'Track'")
+  # Choose between:
+  # Routed
+	(constraint edge_clearance (min 0.3mm))
+  # V-Cut Panel
+	# (constraint edge_clearance (min 0.4mm))
+)

ch585_dev/ch585_dev_revb_1.kicad_pro

@@ -0,0 +1,656 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "apply_defaults_to_fp_fields": false,
+        "apply_defaults_to_fp_shapes": false,
+        "apply_defaults_to_fp_text": false,
+        "board_outline_line_width": 0.05,
+        "copper_line_width": 0.2,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.05,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": true,
+          "text_position": 0,
+          "units_format": 0
+        },
+        "fab_line_width": 0.1,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.1,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.0,
+          "height": 1.0,
+          "width": 1.0
+        },
+        "silk_line_width": 0.1,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.1,
+        "silk_text_upright": false,
+        "zones": {
+          "min_clearance": 0.15
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        },
+        {
+          "gap": 0.2,
+          "via_gap": 0.0,
+          "width": 0.2
+        }
+      ],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
+        "courtyards_overlap": "warning",
+        "creepage": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "warning",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint": "error",
+        "footprint_filters_mismatch": "ignore",
+        "footprint_symbol_mismatch": "warning",
+        "footprint_type_mismatch": "ignore",
+        "hole_clearance": "error",
+        "hole_to_hole": "warning",
+        "holes_co_located": "warning",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "warning",
+        "lib_footprint_mismatch": "warning",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "mirrored_text_on_front_layer": "warning",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "nonmirrored_text_on_back_layer": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "warning",
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ch585_dev/out/ch585_dev-Margin.svg

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+  xmlns="http://www.w3.org/2000/svg"
+  xmlns:xlink="http://www.w3.org/1999/xlink"
+  version="1.1"
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+<title>SVG Image created as ch585_dev-Margin.svg date 2026/02/17 22:09:28 </title>
+  <desc>Image generated by PCBNEW </desc>
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+ transform="translate(0 0) scale(1 1)">
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+</svg>

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ch585_dev/production/bom.csv

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+Designator,Footprint,Quantity,Value,LCSC Part #
+AE1,Texas_SWRA117D_2.4GHz_Left,1,2.4GHz ANT,
+AE2,Antenna_367x254mm,1,NFC_ANT,
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+D2,0805,1,PWR_LED,
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+SW2,TS3425PA,1,RST,
+U1,QFN-48-WCH,1,CH585M,
+U2,SOT-23-5,1,RT9013-33GB,
+Y1,Crystal_SMD_3215-2Pin_3.2x1.5mm,1,32.768kHz,
+Y2,Crystal_SMD_3225-4Pin_3.2x2.5mm,1,32MHz ±10ppm 12pF,

ch585_dev/production/designators.csv

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+AE2:1
+C1:1
+C10:1
+C11:1
+C12:1
+C13:1
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+SW2:1
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+Y2:1

ch585_dev/production/netlist.ipc

@@ -0,0 +1,445 @@
+P  CODE 00
+P  UNITS CUST 0
+P  arrayDim   N
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+317GND              VIA        MD0118PA00X+022953Y-032874X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+022323Y-026000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+022228Y-028504X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+012323Y-029000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+022559Y-038701X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+016142Y-041024X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+022677Y-040118X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+020512Y-042087X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+023323Y-030000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+025323Y-039000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+028323Y-028000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+025323Y-026000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+019331Y-042087X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+018323Y-027000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+020209Y-033465X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+021244Y-027520X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+025323Y-041000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+018323Y-032000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+016323Y-026000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+026024Y-042087X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+024323Y-026000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+013323Y-029000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+016323Y-031000X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+024567Y-040866X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+022323Y-033268X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+023583Y-041457X0197Y0000R000S3
+317GND              VIA        MD0118PA00X+025323Y-040000X0197Y0000R000S3
+317+3V3             VIA        MD0118PA00X+024134Y-033189X0197Y0000R000S3
+317+3V3             VIA        MD0118PA00X+024606Y-032283X0197Y0000R000S3
+317+3V3             VIA        MD0118PA00X+016417Y-038701X0197Y0000R000S3
+317+3V3             VIA        MD0118PA00X+016417Y-040827X0197Y0000R000S3
+317+3V3             VIA        MD0118PA00X+017104Y-034685X0197Y0000R000S3
+317+3V3             VIA        MD0118PA00X+022362Y-034173X0197Y0000R000S3
+317NET-(U1-VDCIA)   VIA        MD0118PA00X+022224Y-037343X0197Y0000R000S3
+317NET-(U1-VDCIA)   VIA        MD0118PA00X+023134Y-035295X0197Y0000R000S3
+317VBUS             VIA        MD0118PA00X+017059Y-030394X0197Y0000R000S3
+317/UD-             VIA        MD0118PA00X+018012Y-035866X0197Y0000R000S3
+317/UD-             VIA        MD0118PA00X+018012Y-035217X0197Y0000R000S3
+317/ANT+            VIA        MD0118PA00X+022071Y-029055X0197Y0000R000S3
+317/ANT-            VIA        MD0118PA00X+019281Y-026969X0197Y0000R000S3
+317/TCK             VIA        MD0118PA00X+015630Y-031594X0197Y0000R000S3
+317/TCK             VIA        MD0118PA00X+018228Y-033268X0197Y0000R000S3
+317/TIO             VIA        MD0118PA00X+015630Y-032047X0197Y0000R000S3
+317/TIO             VIA        MD0118PA00X+018228Y-033661X0197Y0000R000S3
+317/~{ISP}          VIA        MD0118PA00X+013209Y-042185X0197Y0000R000S3
+317/~{RST}          VIA        MD0118PA00X+013031Y-043199X0197Y0000R000S3
+317/UD2+            VIA        MD0118PA00X+019094Y-034961X0197Y0000R000S3
+317NET-(JP3-B)      VIA        MD0118PA00X+021717Y-024579X0197Y0000R000S3
+327GND              R14   -2          A01X+024475Y-027329X0315Y0374R225S2
+327NET-(J3-CC2)     R14   -1          A01X+024934Y-027789X0315Y0374R225S2
+327ET-(J4-PIN_14)   J4    -14         A02X+022701Y-026929X0945Y0291R270S1
+327ET-(J4-PIN_13)   J4    -13         A02X+022701Y-028465X0945Y0291R270S1
+327-PIN_12-PAD12)   J4    -12         A02X+023201Y-026929X0945Y0291R270S1
+327-PIN_11-PAD11)   J4    -11         A02X+023201Y-028465X0945Y0291R270S1
+327-PIN_10-PAD10)   J4    -10         A02X+023701Y-026929X0945Y0291R270S1
+327J4-PIN_9-PAD9)   J4    -9          A02X+023701Y-028465X0945Y0291R270S1
+327J4-PIN_8-PAD8)   J4    -8          A02X+024201Y-026929X0945Y0291R270S1
+327J4-PIN_7-PAD7)   J4    -7          A02X+024201Y-028465X0945Y0291R270S1
+327J4-PIN_6-PAD6)   J4    -6          A02X+024701Y-026929X0945Y0291R270S1
+327J4-PIN_5-PAD5)   J4    -5          A02X+024701Y-028465X0945Y0291R270S1
+327J4-PIN_4-PAD4)   J4    -4          A02X+025201Y-026929X0945Y0291R270S1
+327J4-PIN_3-PAD3)   J4    -3          A02X+025201Y-028465X0945Y0291R270S1
+327J4-PIN_2-PAD2)   J4    -2          A02X+025701Y-026929X0945Y0291R270S1
+327J4-PIN_1-PAD1)   J4    -1          A02X+025701Y-028465X0945Y0291R270S1
+327NET-(U1-VINTA)   C14   -1          A01X+021008Y-038396X0354Y0374R090S2
+327GND              C14   -2          A01X+021008Y-039006X0354Y0374R090S2
+327/PB19            JP2   -1          A01X+015177Y-040748X0394Y0197R000S2
+327NET-(JP2-B)      JP2   -2          A01X+015689Y-040748X0394Y0197R000S2
+327NET-(JP1-A)      R8    -1          A01X+016575Y-039478X0315Y0374R090S2
+327NET-(D3-K)       R8    -2          A01X+016575Y-040128X0315Y0374R090S2
+327NET-(C10-PAD2)   R6    -1          A01X+018956Y-029415X0315Y0374R300S2
+327/ANT-            R6    -2          A01X+019281Y-028853X0315Y0374R300S2
+327NET-(C3-PAD1)    C3    -1          A01X+021427Y-032677X0354Y0374R180S2
+327GND              C3    -2          A01X+020817Y-032677X0354Y0374R180S2
+327GND              SW1   -1          A01X+012657Y-041348X0472Y0256R000S2
+327GND              SW1   -1          A01X+014350Y-041348X0472Y0256R000S2
+327/~{ISP}          SW1   -2          A01X+012657Y-042195X0472Y0256R000S2
+327/~{ISP}          SW1   -2          A01X+014350Y-042195X0472Y0256R000S2
+327NET-(D4-K)       R9    -1          A01X+015758Y-041693X0315Y0374R180S2
+327NET-(JP2-B)      R9    -2          A01X+015108Y-041693X0315Y0374R180S2
+327NET-(C11-PAD1)   C9    -1          A01X+021427Y-030748X0354Y0374R180S2
+327GND              C9    -2          A01X+020817Y-030748X0354Y0374R180S2
+327+3V3             R7    -1          A01X+016801Y-038701X0315Y0374R000S2
+327NET-(D2-A)       R7    -2          A01X+017451Y-038701X0315Y0374R000S2
+327NET-(C17-PAD1)   R10   -1          A01X+024055Y-040699X0315Y0374R090S2
+327NET-(AE1-PAD1)   R10   -2          A01X+024055Y-041348X0315Y0374R090S2
+317GND              J5    -1    D0394PA00X+012530Y-031039X0669Y0669R000S0
+317VCC              J5    -2    D0394PA00X+013530Y-031039X0669Y0000R000S0
+317/TCK             J5    -3    D0394PA00X+012530Y-032039X0669Y0000R000S0
+317/TIO             J5    -4    D0394PA00X+013530Y-032039X0669Y0000R000S0
+317+3V3             J5    -5    D0394PA00X+012530Y-033039X0669Y0000R000S0
+317+3V3             J5    -6    D0394PA00X+013530Y-033039X0669Y0000R000S0
+317/PB7             J5    -7    D0394PA00X+012530Y-034039X0669Y0000R000S0
+317/PB6             J5    -8    D0394PA00X+013530Y-034039X0669Y0000R000S0
+317/PB5             J5    -9    D0394PA00X+012530Y-035039X0669Y0000R000S0
+317/PB4             J5    -10   D0394PA00X+013530Y-035039X0669Y0000R000S0
+317/PB3             J5    -11   D0394PA00X+012530Y-036039X0669Y0000R000S0
+317/PB2             J5    -12   D0394PA00X+013530Y-036039X0669Y0000R000S0
+317/PB1             J5    -13   D0394PA00X+012530Y-037039X0669Y0000R000S0
+317/PB0             J5    -14   D0394PA00X+013530Y-037039X0669Y0000R000S0
+317/~{RST}          J5    -15   D0394PA00X+012530Y-038039X0669Y0000R000S0
+317/~{ISP}          J5    -16   D0394PA00X+013530Y-038039X0669Y0000R000S0
+317/PB21            J5    -17   D0394PA00X+012530Y-039039X0669Y0000R000S0
+317/PB20            J5    -18   D0394PA00X+013530Y-039039X0669Y0000R000S0
+317/PB19            J5    -19   D0394PA00X+012530Y-040039X0669Y0000R000S0
+317/PB18            J5    -20   D0394PA00X+013530Y-040039X0669Y0000R000S0
+327GND              C10   -1          A01X+019577Y-030748X0354Y0374R180S2
+327NET-(C10-PAD2)   C10   -2          A01X+018967Y-030748X0354Y0374R180S2
+327/NFC-            NFC-  -1          A01X+019862Y-034252X0394Y0000R000S2
+327+3V3             C2    -1          A01X+017104Y-034289X0394Y0571R180S2
+327GND              C2    -2          A01X+016356Y-034289X0394Y0571R180S2
+327NET-(C11-PAD1)   C11   -1          A01X+021427Y-030118X0354Y0374R180S2
+327GND              C11   -2          A01X+020817Y-030118X0354Y0374R180S2
+327/NFCI            C7    -1          A01X+024016Y-031880X0354Y0374R270S2
+327NET-(C7-PAD2)    C7    -2          A01X+024016Y-031270X0354Y0374R270S2
+327VBUS             D1    -1          A01X+016300Y-029787X0581Y0236R045S2
+327VCC              D1    -2          A01X+015771Y-030316X0581Y0236R045S2
+327+5V              D1    -3          A01X+016558Y-030573X0581Y0236R045S2
+317NET-(JP3-B)      AE2   -1    D0118PA00X+021705Y-022677X0236Y0000R000S0
+317NET-(JP4-B)      AE2   -2    D0118PA00X+019315Y-024252X0236Y0000R000S0
+327GND              D2    -1          A01X+018164Y-040197X0384Y0551R180S2
+327NET-(D2-A)       D2    -2          A01X+017426Y-040197X0384Y0551R180S2
+327NET-(C17-PAD1)   C17   -1          A01X+023367Y-040176X0354Y0374R315S2
+327GND              C17   -2          A01X+023798Y-039745X0354Y0374R315S2
+327NET-(J1-CC2)     R1    -1          A01X+016132Y-028937X0315Y0374R000S2
+327GND              R1    -2          A01X+016781Y-028937X0315Y0374R000S2
+327NET-(U1-VDCIA)   C15   -1          A01X+023976Y-034272X0394Y0571R090S2
+327GND              C15   -2          A01X+023976Y-035020X0394Y0571R090S2
+327GND              SW2   -1          A01X+014350Y-044045X0472Y0256R180S2
+327GND              SW2   -1          A01X+012657Y-044045X0472Y0256R180S2
+327/~{RST}          SW2   -2          A01X+014350Y-043199X0472Y0256R180S2
+327/~{RST}          SW2   -2          A01X+012657Y-043199X0472Y0256R180S2
+327NET-(J2-IN)      J2    -1          A01X+022579Y-041339X0413Y0394R180S2
+327GND              J2    -2          A01X+021978Y-041919X0866Y0413R180S2
+327GND              J2    -2          A01X+021978Y-040758X0866Y0413R180S2
+317GND              J6    -1    D0394PA00X+027530Y-031039X0669Y0669R000S0
+317GND              J6    -2    D0394PA00X+028530Y-031039X0669Y0000R000S0
+317+3V3             J6    -3    D0394PA00X+027530Y-032039X0669Y0000R000S0
+317+3V3             J6    -4    D0394PA00X+028530Y-032039X0669Y0000R000S0
+317/RXD1            J6    -5    D0394PA00X+027530Y-033039X0669Y0000R000S0
+317/TXD1            J6    -6    D0394PA00X+028530Y-033039X0669Y0000R000S0
+317/PA12            J6    -7    D0394PA00X+027530Y-034039X0669Y0000R000S0
+317/PA7             J6    -8    D0394PA00X+028530Y-034039X0669Y0000R000S0
+317/PA14            J6    -9    D0394PA00X+027530Y-035039X0669Y0000R000S0
+317/PA13            J6    -10   D0394PA00X+028530Y-035039X0669Y0000R000S0
+317/PA3             J6    -11   D0394PA00X+027530Y-036039X0669Y0000R000S0
+317/PA15            J6    -12   D0394PA00X+028530Y-036039X0669Y0000R000S0
+317/PA1             J6    -13   D0394PA00X+027530Y-037039X0669Y0000R000S0
+317/PA2             J6    -14   D0394PA00X+028530Y-037039X0669Y0000R000S0
+317/PA6             J6    -15   D0394PA00X+027530Y-038039X0669Y0000R000S0
+317/PA0             J6    -16   D0394PA00X+028530Y-038039X0669Y0000R000S0
+317/PA4             J6    -17   D0394PA00X+027530Y-039039X0669Y0000R000S0
+317/PA5             J6    -18   D0394PA00X+028530Y-039039X0669Y0000R000S0
+317GND              J6    -19   D0394PA00X+027530Y-040039X0669Y0000R000S0
+317GND              J6    -20   D0394PA00X+028530Y-040039X0669Y0000R000S0
+327+5V              C1    -1          A01X+017104Y-031572X0394Y0571R180S2
+327GND              C1    -2          A01X+016356Y-031572X0394Y0571R180S2
+327+5V              U2    -1          A01X+017104Y-032542X0522Y0236R090S2
+327GND              U2    -2          A01X+016730Y-032542X0522Y0236R090S2
+327+5V              U2    -3          A01X+016356Y-032542X0522Y0236R090S2
+327D-(U2-NC-PAD4)   U2    -4          A01X+016356Y-033437X0522Y0236R090S2
+327+3V3             U2    -5          A01X+017104Y-033437X0522Y0236R090S2
+327NET-(U1-ANT)     TP3   -1          A01X+021717Y-037992X0394Y0000R000S2
+327/NFCM            C8    -1          A01X+022677Y-032530X0354Y0374R090S2
+327GND              C8    -2          A01X+022677Y-033140X0354Y0374R090S2
+327NET-(J3-CC1)     R15   -1          A01X+025591Y-029951X0315Y0374R090S2
+327GND              R15   -2          A01X+025591Y-030600X0315Y0374R090S2
+327NET-(U1-X32MI)   Y2    -1          A01X+020299Y-038681X0551Y0472R180S2
+327GND              Y2    -2          A01X+019433Y-038681X0551Y0472R180S2
+327NET-(U1-X32MO)   Y2    -3          A01X+019433Y-039350X0551Y0472R180S2
+327GND              Y2    -4          A01X+020299Y-039350X0551Y0472R180S2
+327GND              J1    -A1         A01X+014703Y-026890X0236Y0512R090S2
+327VBUS             J1    -A4         A01X+014703Y-027205X0236Y0512R090S2
+327NET-(J1-CC1)     J1    -A5         A01X+014703Y-027657X0118Y0512R090S2
+327/UD+             J1    -A6         A01X+014703Y-028051X0118Y0512R090S2
+327/UD-             J1    -A7         A01X+014703Y-028248X0118Y0512R090S2
+327J1-SBU1-PADA8)   J1    -A8         A01X+014703Y-028642X0118Y0512R090S2
+327VBUS             J1    -A9         A01X+014703Y-029094X0236Y0512R090S2
+327GND              J1    -A12        A01X+014703Y-029409X0236Y0512R090S2
+327GND              J1    -B1         A01X+014703Y-029409X0236Y0512R090S2
+327VBUS             J1    -B4         A01X+014703Y-029094X0236Y0512R090S2
+327NET-(J1-CC2)     J1    -B5         A01X+014703Y-028839X0118Y0512R090S2
+327/UD+             J1    -B6         A01X+014703Y-028445X0118Y0512R090S2
+327/UD-             J1    -B7         A01X+014703Y-027854X0118Y0512R090S2
+327J1-SBU2-PADB8)   J1    -B8         A01X+014703Y-027461X0118Y0512R090S2
+327VBUS             J1    -B9         A01X+014703Y-027205X0236Y0512R090S2
+327GND              J1    -B12        A01X+014703Y-026890X0236Y0512R090S2
+317GND              J1    -S1   D0236PA00X+014451Y-026449X0394Y0827R090S0
+317GND              J1    -S1   D0236PA00X+012805Y-026449X0394Y0630R090S0
+317GND              J1    -S1   D0236PA00X+014451Y-029850X0394Y0827R090S0
+317GND              J1    -S1   D0236PA00X+012805Y-029850X0394Y0630R090S0
+327NET-(C7-PAD2)    R3    -1          A01X+023317Y-031260X0315Y0374R180S2
+327NET-(C11-PAD1)   R3    -2          A01X+022667Y-031260X0315Y0374R180S2
+327NET-(U1-ANT)     C16   -1          A01X+021910Y-038720X0354Y0374R315S2
+327GND              C16   -2          A01X+022342Y-038288X0354Y0374R315S2
+327/NFC+            L1    -1          A01X+020982Y-033802X0344Y0374R315S2
+327NET-(C3-PAD1)    L1    -2          A01X+021420Y-033363X0344Y0374R315S2
+327NET-(U1-PA11)    Y1    -1          A01X+024243Y-036096X0394Y0709R135S2
+327NET-(U1-PA10)    Y1    -2          A01X+024939Y-035400X0394Y0709R135S2
+327NET-(JP1-A)      JP1   -1          A01X+015689Y-039685X0394Y0197R180S2
+327/PB18            JP1   -2          A01X+015177Y-039685X0394Y0197R180S2
+327NET-(D4-K)       D4    -1          A01X+015354Y-043755X0384Y0551R270S2
+327+3V3             D4    -2          A01X+015354Y-043017X0384Y0551R270S2
+327NET-(AE1-PAD1)   TP4   -1          A01X+024055Y-042008X0394Y0000R000S2
+327NET-(U1-VDCIA)   U1    -1          A01X+021382Y-035423X0079Y0315R180S2
+327NET-(U1-VSW)     U1    -2          A01X+021244Y-035423X0079Y0315R180S2
+327+3V3             U1    -3          A01X+021106Y-035423X0079Y0315R180S2
+327/PA7             U1    -4          A01X+020969Y-035423X0079Y0315R180S2
+327/RXD1            U1    -5          A01X+020831Y-035423X0079Y0315R180S2
+327/TXD1            U1    -6          A01X+020693Y-035423X0079Y0315R180S2
+327/NFCI            U1    -7          A01X+020555Y-035423X0079Y0315R180S2
+327/NFCM            U1    -8          A01X+020417Y-035423X0079Y0315R180S2
+327/NFC+            U1    -9          A01X+020280Y-035423X0079Y0315R180S2
+327/NFC-            U1    -10         A01X+020142Y-035423X0079Y0315R180S2
+327/TCK             U1    -11         A01X+019797Y-035492X0315Y0079R180S2
+327/TIO             U1    -12         A01X+019797Y-035630X0315Y0079R180S2
+327/UD2+            U1    -13         A01X+019797Y-035768X0315Y0079R180S2
+327/UD2-            U1    -14         A01X+019797Y-035906X0315Y0079R180S2
+327/UD+             U1    -15         A01X+019797Y-036043X0315Y0079R180S2
+327/UD-             U1    -16         A01X+019797Y-036181X0315Y0079R180S2
+327/PB7             U1    -17         A01X+019797Y-036319X0315Y0079R180S2
+327/PB6             U1    -18         A01X+019797Y-036457X0315Y0079R180S2
+327/PB5             U1    -19         A01X+019797Y-036594X0315Y0079R180S2
+327/PB4             U1    -20         A01X+019797Y-036732X0315Y0079R180S2
+327/PB3             U1    -21         A01X+019797Y-036870X0315Y0079R180S2
+327/PB2             U1    -22         A01X+019797Y-037008X0315Y0079R180S2
+327/PB1             U1    -23         A01X+019797Y-037146X0315Y0079R180S2
+327/PB0             U1    -24         A01X+019797Y-037283X0315Y0079R180S2
+327/~{RST}          U1    -25         A01X+020142Y-037352X0079Y0315R180S2
+327/~{ISP}          U1    -26         A01X+020280Y-037352X0079Y0315R180S2
+327/PB21            U1    -27         A01X+020417Y-037352X0079Y0315R180S2
+327/PB20            U1    -28         A01X+020555Y-037352X0079Y0315R180S2
+327/PB19            U1    -29         A01X+020693Y-037352X0079Y0315R180S2
+327/PB18            U1    -30         A01X+020831Y-037352X0079Y0315R180S2
+327NET-(U1-X32MO)   U1    -31         A01X+020969Y-037352X0079Y0315R180S2
+327NET-(U1-X32MI)   U1    -32         A01X+021106Y-037352X0079Y0315R180S2
+327NET-(U1-VINTA)   U1    -33         A01X+021244Y-037352X0079Y0315R180S2
+327NET-(U1-ANT)     U1    -34         A01X+021382Y-037352X0079Y0315R180S2
+327NET-(U1-VDCIA)   U1    -35         A01X+021726Y-037283X0315Y0079R180S2
+327/PA4             U1    -36         A01X+021726Y-037146X0315Y0079R180S2
+327/PA5             U1    -37         A01X+021726Y-037008X0315Y0079R180S2
+327/PA6             U1    -38         A01X+021726Y-036870X0315Y0079R180S2
+327/PA0             U1    -39         A01X+021726Y-036732X0315Y0079R180S2
+327/PA1             U1    -40         A01X+021726Y-036594X0315Y0079R180S2
+327/PA2             U1    -41         A01X+021726Y-036457X0315Y0079R180S2
+327/PA3             U1    -42         A01X+021726Y-036319X0315Y0079R180S2
+327/PA15            U1    -43         A01X+021726Y-036181X0315Y0079R180S2
+327/PA14            U1    -44         A01X+021726Y-036043X0315Y0079R180S2
+327/PA13            U1    -45         A01X+021726Y-035906X0315Y0079R180S2
+327/PA12            U1    -46         A01X+021726Y-035768X0315Y0079R180S2
+327NET-(U1-PA11)    U1    -47         A01X+021726Y-035630X0315Y0079R180S2
+327NET-(U1-PA10)    U1    -48         A01X+021726Y-035492X0315Y0079R180S2
+317GND              U1    -49   D0118PA00X+021372Y-036998X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+021372Y-036598X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+021372Y-036178X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+021372Y-035778X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020972Y-036998X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020972Y-036598X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020972Y-036178X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020972Y-035778X0236Y0000R180S3
+327GND              U1    -49         A01X+020762Y-036388X1457Y1457R180S2
+327GND              U1    -49         A02X+020762Y-036388X1457Y1457R180S3
+317GND              U1    -49   D0118PA00X+020552Y-036998X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020552Y-036598X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020552Y-036178X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020552Y-035778X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020152Y-036998X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020152Y-036598X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020152Y-036178X0236Y0000R180S3
+317GND              U1    -49   D0118PA00X+020152Y-035778X0236Y0000R180S3
+327NET-(J1-CC1)     R2    -1          A01X+016132Y-027638X0315Y0374R000S2
+327GND              R2    -2          A01X+016781Y-027638X0315Y0374R000S2
+327NET-(C4-PAD2)    C6    -1          A01X+018957Y-031998X0354Y0374R270S2
+327NET-(C10-PAD2)   C6    -2          A01X+018957Y-031388X0354Y0374R270S2
+327+3V3             C13   -1          A01X+022264Y-034528X0394Y0571R000S2
+327GND              C13   -2          A01X+023012Y-034528X0394Y0571R000S2
+327NET-(U1-VDCIA)   L3    -1          A01X+024843Y-034592X0344Y0472R270S2
+327NET-(U1-VSW)     L3    -2          A01X+024843Y-033755X0344Y0472R270S2
+327/NFCI            R4    -1          A01X+023307Y-031880X0315Y0374R090S2
+327/NFCM            R4    -2          A01X+023307Y-032530X0315Y0374R090S2
+327NET-(AE1-PAD1)   AE1   -1          A01X+024075Y-042549X0197Y0197R180S2
+327GND              AE1   -2          A01X+023248Y-042555X0354Y0327R180S2
+327NET-(D3-K)       D3    -1          A01X+016535Y-043755X0384Y0551R270S2
+327+3V3             D3    -2          A01X+016535Y-043017X0384Y0551R270S2
+327NET-(U1-ANT)     L4    -1          A01X+022379Y-039190X0344Y0374R045S2
+327NET-(C17-PAD1)   L4    -2          A01X+022818Y-039629X0344Y0374R045S2
+327NET-(U1-VDCIA)   C18   -1          A01X+022835Y-037658X0354Y0374R045S2
+327GND              C18   -2          A01X+023267Y-038090X0354Y0374R045S2
+327/ANT+            JP3   -1          A01X+021717Y-026437X0394Y0197R270S2
+327NET-(JP3-B)      JP3   -2          A01X+021717Y-025925X0394Y0197R270S2
+327GND              C12   -1          A01X+019577Y-030118X0354Y0374R180S2
+327NET-(C10-PAD2)   C12   -2          A01X+018967Y-030118X0354Y0374R180S2
+327GND              J3    -A1         A01X+026372Y-029449X0236Y0512R270S2
+327VBUS             J3    -A4         A01X+026372Y-029134X0236Y0512R270S2
+327NET-(J3-CC1)     J3    -A5         A01X+026372Y-028681X0118Y0512R270S2
+327/UD2+            J3    -A6         A01X+026372Y-028287X0118Y0512R270S2
+327/UD2-            J3    -A7         A01X+026372Y-028091X0118Y0512R270S2
+327J3-SBU1-PADA8)   J3    -A8         A01X+026372Y-027697X0118Y0512R270S2
+327VBUS             J3    -A9         A01X+026372Y-027244X0236Y0512R270S2
+327GND              J3    -A12        A01X+026372Y-026929X0236Y0512R270S2
+327GND              J3    -B1         A01X+026372Y-026929X0236Y0512R270S2
+327VBUS             J3    -B4         A01X+026372Y-027244X0236Y0512R270S2
+327NET-(J3-CC2)     J3    -B5         A01X+026372Y-027500X0118Y0512R270S2
+327/UD2+            J3    -B6         A01X+026372Y-027894X0118Y0512R270S2
+327/UD2-            J3    -B7         A01X+026372Y-028484X0118Y0512R270S2
+327J3-SBU2-PADB8)   J3    -B8         A01X+026372Y-028878X0118Y0512R270S2
+327VBUS             J3    -B9         A01X+026372Y-029134X0236Y0512R270S2
+327GND              J3    -B12        A01X+026372Y-029449X0236Y0512R270S2
+317GND              J3    -S1   D0236PA00X+026624Y-029890X0394Y0827R270S0
+317GND              J3    -S1   D0236PA00X+028270Y-029890X0394Y0630R270S0
+317GND              J3    -S1   D0236PA00X+026624Y-026488X0394Y0827R270S0
+317GND              J3    -S1   D0236PA00X+028270Y-026488X0394Y0630R270S0
+327NET-(C11-PAD1)   R5    -1          A01X+021397Y-029415X0315Y0374R300S2
+327/ANT+            R5    -2          A01X+021721Y-028853X0315Y0374R300S2
+327NET-(C3-PAD1)    C5    -1          A01X+021437Y-032037X0354Y0374R270S2
+327NET-(C11-PAD1)   C5    -2          A01X+021437Y-031427X0354Y0374R270S2
+327/ANT-            JP4   -1          A01X+019315Y-026437X0394Y0197R270S2
+327NET-(JP4-B)      JP4   -2          A01X+019315Y-025925X0394Y0197R270S2
+327/NFC-            L2    -1          A01X+019452Y-033802X0344Y0374R225S2
+327NET-(C4-PAD2)    L2    -2          A01X+019013Y-033363X0344Y0374R225S2
+327NET-(C17-PAD1)   R11   -1          A01X+023785Y-040597X0315Y0374R135S2
+327NET-(J2-IN)      R11   -2          A01X+023325Y-041056X0315Y0374R135S2
+327/NFC+            NFC+  -1          A01X+020610Y-034252X0394Y0000R000S2
+327GND              C4    -1          A01X+019577Y-032677X0354Y0374R180S2
+327NET-(C4-PAD2)    C4    -2          A01X+018967Y-032677X0354Y0374R180S2
+327/ANT-            R12   -1          A02X+019778Y-026969X0315Y0374R000S1
+327ET-(J4-PIN_14)   R12   -2          A02X+020427Y-026969X0315Y0374R000S1
+327ET-(J4-PIN_13)   R13   -1          A02X+022746Y-030005X0315Y0374R210S1
+327/ANT+            R13   -2          A02X+022183Y-029680X0315Y0374R210S1
+999

ch585_dev/production/positions.csv

@@ -0,0 +1,53 @@
+Designator,Mid X,Mid Y,Rotation,Layer
+AE2,52.095,-59.6,0.0,top
+C1,42.493449,-80.193449,180.0,top
+C10,48.95,-78.1,180.0,top
+C11,53.65,-76.5,180.0,top
+C12,48.95,-76.5,180.0,top
+C13,57.5,-87.7,0.0,top
+C14,53.36,-98.3,270.0,top
+C15,60.9,-88.0,270.0,top
+C16,56.2,-97.8,45.0,top
+C17,59.9,-101.5,45.0,top
+C18,58.55,-96.2,315.0,top
+C2,42.493449,-87.093449,180.0,top
+C3,53.65,-83.0,180.0,top
+C4,48.95,-83.0,180.0,top
+C5,54.45,-80.6,90.0,top
+C6,48.15,-80.5,90.0,top
+C7,61.0,-80.2,90.0,top
+C8,57.6,-83.4,270.0,top
+C9,53.65,-78.1,180.0,top
+D1,41.393449,-76.993449,135.0,top
+D2,45.2,-102.1,180.0,top
+D3,42.0,-110.2,90.0,top
+D4,39.0,-110.2,90.0,top
+J1,33.6,-71.5,270.0,top
+J2,56.3,-105.0,180.0,top
+J3,70.73,-71.6,90.0,top
+J4,61.47,-70.35,90.0,bottom
+J5,33.095,-90.27,0.0,top
+J6,71.195,-90.27,0.0,top
+L1,53.85,-85.3,45.0,top
+L2,48.85,-85.3,135.0,top
+L3,63.1,-86.8,90.0,top
+L4,57.4,-100.1,315.0,top
+R1,41.8,-73.5,0.0,top
+R10,61.1,-104.2,270.0,top
+R12,51.06,-68.5,180.0,bottom
+R13,57.06,-75.8,30.0,bottom
+R14,62.75,-70.0,135.0,top
+R15,65.0,-76.9,270.0,top
+R2,41.8,-70.2,0.0,top
+R3,58.4,-79.4,180.0,top
+R4,59.2,-81.8,270.0,top
+R5,54.76,-74.0,60.0,top
+R6,48.56,-74.0,60.0,top
+R7,43.5,-98.3,0.0,top
+R8,42.1,-101.1,270.0,top
+R9,39.2,-105.9,180.0,top
+SW1,34.3,-106.1,0.0,top
+SW2,34.3,-110.8,180.0,top
+U2,42.493449,-83.793449,90.0,top
+Y1,62.46,-90.8,225.0,top
+Y2,50.46,-99.1,180.0,top

ch585_dev/sym-lib-table

@@ -0,0 +1,4 @@
+(sym_lib_table
+  (version 0)
+  (lib (name "ch585_dev-altium-import")(type "KiCad")(uri "${KIPRJMOD}/ch585_dev-altium-import.kicad_sym")(options "")(descr ""))
+)

hakko_station/gerber/hakko_station-B_Mask.gbs

@@ -0,0 +1,129 @@
+%TF.GenerationSoftware,KiCad,Pcbnew,9.99.0-679-g5f620f0fa1*%
+%TF.CreationDate,2025-04-01T17:44:37+06:00*%
+%TF.ProjectId,hakko_station,68616b6b-6f5f-4737-9461-74696f6e2e6b,rev?*%
+%TF.SameCoordinates,Original*%
+%TF.FileFunction,Soldermask,Bot*%
+%TF.FilePolarity,Negative*%
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 9.99.0-679-g5f620f0fa1) date 2025-04-01 17:44:37*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 Aperture macros list*
+%AMRoundRect*
+0 Rectangle with rounded corners*
+0 $1 Rounding radius*
+0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
+0 Add a 4 corners polygon primitive as box body*
+4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
+0 Add four circle primitives for the rounded corners*
+1,1,$1+$1,$2,$3*
+1,1,$1+$1,$4,$5*
+1,1,$1+$1,$6,$7*
+1,1,$1+$1,$8,$9*
+0 Add four rect primitives between the rounded corners*
+20,1,$1+$1,$2,$3,$4,$5,0*
+20,1,$1+$1,$4,$5,$6,$7,0*
+20,1,$1+$1,$6,$7,$8,$9,0*
+20,1,$1+$1,$8,$9,$2,$3,0*%
+G04 Aperture macros list end*
+%ADD10R,2.000000X2.000000*%
+%ADD11C,2.000000*%
+%ADD12R,2.000000X3.200000*%
+%ADD13RoundRect,0.250001X0.899999X-0.899999X0.899999X0.899999X-0.899999X0.899999X-0.899999X-0.899999X0*%
+%ADD14C,2.300000*%
+%ADD15C,5.600000*%
+%ADD16R,1.700000X1.700000*%
+%ADD17O,1.700000X1.700000*%
+%ADD18RoundRect,0.250000X0.725000X-0.600000X0.725000X0.600000X-0.725000X0.600000X-0.725000X-0.600000X0*%
+%ADD19O,1.950000X1.700000*%
+%ADD20RoundRect,0.250002X-1.499998X-1.499998X1.499998X-1.499998X1.499998X1.499998X-1.499998X1.499998X0*%
+%ADD21C,3.500000*%
+G04 APERTURE END LIST*
+D10*
+%TO.C,SW1*%
+X81000000Y-76250000D03*
+D11*
+X76000000Y-76250000D03*
+X78500000Y-76250000D03*
+D12*
+X84100000Y-83750000D03*
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+X76000000Y-90750000D03*
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+%TD*%
+D13*
+%TO.C,J3*%
+X74000000Y-117800000D03*
+D14*
+X74000000Y-113000000D03*
+X74000000Y-108200000D03*
+X74000000Y-103400000D03*
+X74000000Y-98600000D03*
+%TD*%
+D15*
+%TO.C,H2*%
+X119500000Y-71000000D03*
+%TD*%
+D16*
+%TO.C,J5*%
+X96300000Y-76500000D03*
+D17*
+X93760000Y-76500000D03*
+X91220000Y-76500000D03*
+X88680000Y-76500000D03*
+%TD*%
+D15*
+%TO.C,H4*%
+X74500000Y-124500000D03*
+%TD*%
+%TO.C,H3*%
+X119500000Y-124500000D03*
+%TD*%
+D11*
+%TO.C,TP6*%
+X102497000Y-110800000D03*
+%TD*%
+D15*
+%TO.C,H1*%
+X74500000Y-71000000D03*
+%TD*%
+D18*
+%TO.C,J1*%
+X116000000Y-91750000D03*
+D19*
+X116000000Y-89250000D03*
+X116000000Y-86750000D03*
+X116000000Y-84250000D03*
+%TD*%
+D11*
+%TO.C,TP2*%
+X115500000Y-110300000D03*
+%TD*%
+D20*
+%TO.C,J2*%
+X95500000Y-124600000D03*
+D21*
+X102500000Y-124600000D03*
+X109500000Y-124600000D03*
+%TD*%
+D13*
+%TO.C,J4*%
+X120000000Y-117800000D03*
+D14*
+X120000000Y-113000000D03*
+X120000000Y-108200000D03*
+X120000000Y-103400000D03*
+X120000000Y-98600000D03*
+%TD*%
+D11*
+%TO.C,TP1*%
+X78500000Y-109900000D03*
+%TD*%
+%TO.C,TP4*%
+X88900000Y-98500000D03*
+%TD*%
+M02*

hakko_station/gerber/hakko_station-B_Paste.gbp

@@ -0,0 +1,15 @@
+%TF.GenerationSoftware,KiCad,Pcbnew,9.99.0-679-g5f620f0fa1*%
+%TF.CreationDate,2025-04-01T17:44:36+06:00*%
+%TF.ProjectId,hakko_station,68616b6b-6f5f-4737-9461-74696f6e2e6b,rev?*%
+%TF.SameCoordinates,Original*%
+%TF.FileFunction,Paste,Bot*%
+%TF.FilePolarity,Positive*%
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 9.99.0-679-g5f620f0fa1) date 2025-04-01 17:44:36*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 APERTURE END LIST*
+M02*

hakko_station/gerber/hakko_station-Edge_Cuts.gm1

@@ -0,0 +1,46 @@
+%TF.GenerationSoftware,KiCad,Pcbnew,9.99.0-679-g5f620f0fa1*%
+%TF.CreationDate,2025-04-01T17:44:38+06:00*%
+%TF.ProjectId,hakko_station,68616b6b-6f5f-4737-9461-74696f6e2e6b,rev?*%
+%TF.SameCoordinates,Original*%
+%TF.FileFunction,Profile,NP*%
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 9.99.0-679-g5f620f0fa1) date 2025-04-01 17:44:38*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+%TA.AperFunction,Profile*%
+%ADD10C,0.050000*%
+%TD*%
+G04 APERTURE END LIST*
+D10*
+X71000000Y-71000000D02*
+G75*
+G02*
+X74500000Y-67500000I3500000J0D01*
+G01*
+X123000000Y-124500000D02*
+G75*
+G02*
+X119500000Y-128000000I-3500000J0D01*
+G01*
+X74500000Y-128000000D02*
+G75*
+G02*
+X71000000Y-124500000I0J3500000D01*
+G01*
+X74500000Y-67500000D02*
+X119500000Y-67500000D01*
+X119500000Y-128000000D02*
+X74500000Y-128000000D01*
+X123000000Y-71000000D02*
+X123000000Y-124500000D01*
+X71000000Y-124500000D02*
+X71000000Y-71000000D01*
+X119500000Y-67500000D02*
+G75*
+G02*
+X123000000Y-71000000I0J-3500000D01*
+G01*
+M02*

hakko_station/gerber/hakko_station-F_Mask.gts

@@ -0,0 +1,515 @@
+%TF.GenerationSoftware,KiCad,Pcbnew,9.99.0-679-g5f620f0fa1*%
+%TF.CreationDate,2025-04-01T17:44:37+06:00*%
+%TF.ProjectId,hakko_station,68616b6b-6f5f-4737-9461-74696f6e2e6b,rev?*%
+%TF.SameCoordinates,Original*%
+%TF.FileFunction,Soldermask,Top*%
+%TF.FilePolarity,Negative*%
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 9.99.0-679-g5f620f0fa1) date 2025-04-01 17:44:37*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 Aperture macros list*
+%AMRoundRect*
+0 Rectangle with rounded corners*
+0 $1 Rounding radius*
+0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
+0 Add a 4 corners polygon primitive as box body*
+4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
+0 Add four circle primitives for the rounded corners*
+1,1,$1+$1,$2,$3*
+1,1,$1+$1,$4,$5*
+1,1,$1+$1,$6,$7*
+1,1,$1+$1,$8,$9*
+0 Add four rect primitives between the rounded corners*
+20,1,$1+$1,$2,$3,$4,$5,0*
+20,1,$1+$1,$4,$5,$6,$7,0*
+20,1,$1+$1,$6,$7,$8,$9,0*
+20,1,$1+$1,$8,$9,$2,$3,0*%
+%AMRotRect*
+0 Rectangle, with rotation*
+0 The origin of the aperture is its center*
+0 $1 length*
+0 $2 width*
+0 $3 Rotation angle, in degrees counterclockwise*
+0 Add horizontal line*
+21,1,$1,$2,0,0,$3*%
+%AMFreePoly0*
+4,1,23,0.500000,-0.750000,0.000000,-0.750000,0.000000,-0.745722,-0.065263,-0.745722,-0.191342,-0.711940,-0.304381,-0.646677,-0.396677,-0.554381,-0.461940,-0.441342,-0.495722,-0.315263,-0.495722,-0.250000,-0.500000,-0.250000,-0.500000,0.250000,-0.495722,0.250000,-0.495722,0.315263,-0.461940,0.441342,-0.396677,0.554381,-0.304381,0.646677,-0.191342,0.711940,-0.065263,0.745722,0.000000,0.745722,
+0.000000,0.750000,0.500000,0.750000,0.500000,-0.750000,0.500000,-0.750000,$1*%
+%AMFreePoly1*
+4,1,23,0.000000,0.745722,0.065263,0.745722,0.191342,0.711940,0.304381,0.646677,0.396677,0.554381,0.461940,0.441342,0.495722,0.315263,0.495722,0.250000,0.500000,0.250000,0.500000,-0.250000,0.495722,-0.250000,0.495722,-0.315263,0.461940,-0.441342,0.396677,-0.554381,0.304381,-0.646677,0.191342,-0.711940,0.065263,-0.745722,0.000000,-0.745722,0.000000,-0.750000,-0.500000,-0.750000,
+-0.500000,0.750000,0.000000,0.750000,0.000000,0.745722,0.000000,0.745722,$1*%
+G04 Aperture macros list end*
+%ADD10R,2.000000X2.000000*%
+%ADD11C,2.000000*%
+%ADD12R,2.000000X3.200000*%
+%ADD13RoundRect,0.250001X0.899999X-0.899999X0.899999X0.899999X-0.899999X0.899999X-0.899999X-0.899999X0*%
+%ADD14C,2.300000*%
+%ADD15C,5.600000*%
+%ADD16RoundRect,0.150000X-0.150000X0.512500X-0.150000X-0.512500X0.150000X-0.512500X0.150000X0.512500X0*%
+%ADD17RoundRect,0.200000X0.200000X0.275000X-0.200000X0.275000X-0.200000X-0.275000X0.200000X-0.275000X0*%
+%ADD18RoundRect,0.200000X0.275000X-0.200000X0.275000X0.200000X-0.275000X0.200000X-0.275000X-0.200000X0*%
+%ADD19RoundRect,0.225000X-0.250000X0.225000X-0.250000X-0.225000X0.250000X-0.225000X0.250000X0.225000X0*%
+%ADD20RoundRect,0.135000X-0.185000X0.135000X-0.185000X-0.135000X0.185000X-0.135000X0.185000X0.135000X0*%
+%ADD21RoundRect,0.250000X-0.350000X0.850000X-0.350000X-0.850000X0.350000X-0.850000X0.350000X0.850000X0*%
+%ADD22RoundRect,0.249997X-2.650003X2.950003X-2.650003X-2.950003X2.650003X-2.950003X2.650003X2.950003X0*%
+%ADD23RoundRect,0.135000X0.185000X-0.135000X0.185000X0.135000X-0.185000X0.135000X-0.185000X-0.135000X0*%
+%ADD24RoundRect,0.100000X-0.225000X-0.100000X0.225000X-0.100000X0.225000X0.100000X-0.225000X0.100000X0*%
+%ADD25FreePoly0,180.000000*%
+%ADD26FreePoly1,180.000000*%
+%ADD27RoundRect,0.250000X1.100000X-0.325000X1.100000X0.325000X-1.100000X0.325000X-1.100000X-0.325000X0*%
+%ADD28RoundRect,0.200000X-0.275000X0.200000X-0.275000X-0.200000X0.275000X-0.200000X0.275000X0.200000X0*%
+%ADD29R,1.700000X1.700000*%
+%ADD30O,1.700000X1.700000*%
+%ADD31RoundRect,0.250000X0.650000X-1.000000X0.650000X1.000000X-0.650000X1.000000X-0.650000X-1.000000X0*%
+%ADD32RoundRect,0.050000X0.300520X-0.229810X-0.229810X0.300520X-0.300520X0.229810X0.229810X-0.300520X0*%
+%ADD33RoundRect,0.050000X0.300520X0.229810X0.229810X0.300520X-0.300520X-0.229810X-0.229810X-0.300520X0*%
+%ADD34RotRect,1.650000X1.650000X135.000000*%
+%ADD35RoundRect,0.150000X-0.825000X-0.150000X0.825000X-0.150000X0.825000X0.150000X-0.825000X0.150000X0*%
+%ADD36RoundRect,0.140000X0.140000X0.170000X-0.140000X0.170000X-0.140000X-0.170000X0.140000X-0.170000X0*%
+%ADD37R,2.200000X1.500000*%
+%ADD38RoundRect,0.200000X-0.200000X-0.275000X0.200000X-0.275000X0.200000X0.275000X-0.200000X0.275000X0*%
+%ADD39FreePoly0,90.000000*%
+%ADD40FreePoly1,90.000000*%
+%ADD41RoundRect,0.150000X0.150000X-0.825000X0.150000X0.825000X-0.150000X0.825000X-0.150000X-0.825000X0*%
+%ADD42RoundRect,0.140000X-0.170000X0.140000X-0.170000X-0.140000X0.170000X-0.140000X0.170000X0.140000X0*%
+%ADD43RoundRect,0.225000X0.225000X0.375000X-0.225000X0.375000X-0.225000X-0.375000X0.225000X-0.375000X0*%
+%ADD44RoundRect,0.140000X-0.219203X-0.021213X-0.021213X-0.219203X0.219203X0.021213X0.021213X0.219203X0*%
+%ADD45FreePoly0,0.000000*%
+%ADD46FreePoly1,0.000000*%
+%ADD47C,1.000000*%
+%ADD48RoundRect,0.100000X-0.100000X0.225000X-0.100000X-0.225000X0.100000X-0.225000X0.100000X0.225000X0*%
+%ADD49RoundRect,0.250000X0.725000X-0.600000X0.725000X0.600000X-0.725000X0.600000X-0.725000X-0.600000X0*%
+%ADD50O,1.950000X1.700000*%
+%ADD51RoundRect,0.250002X-1.499998X-1.499998X1.499998X-1.499998X1.499998X1.499998X-1.499998X1.499998X0*%
+%ADD52C,3.500000*%
+%ADD53RoundRect,0.135000X0.135000X0.185000X-0.135000X0.185000X-0.135000X-0.185000X0.135000X-0.185000X0*%
+%ADD54RoundRect,0.135000X-0.135000X-0.185000X0.135000X-0.185000X0.135000X0.185000X-0.135000X0.185000X0*%
+%ADD55RoundRect,0.250000X0.250000X0.475000X-0.250000X0.475000X-0.250000X-0.475000X0.250000X-0.475000X0*%
+G04 APERTURE END LIST*
+%TO.C,JP2*%
+G36*
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