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3
.gitignore
vendored
3
.gitignore
vendored
@@ -1,6 +1,5 @@
|
||||
make_array
|
||||
rtl8710_flasher.bin
|
||||
rtl8710_flasher.elf
|
||||
rtl8710.ocd
|
||||
dump.bin
|
||||
|
||||
trash/
|
||||
15
.vscode/settings.json
vendored
Normal file
15
.vscode/settings.json
vendored
Normal file
@@ -0,0 +1,15 @@
|
||||
{
|
||||
"files.associations": {
|
||||
"*.rmd": "markdown",
|
||||
"stdio.h": "c",
|
||||
"spi_flash.h": "c",
|
||||
"rtl8710.h": "c",
|
||||
"random": "c",
|
||||
"array": "c",
|
||||
"string": "c",
|
||||
"string_view": "c",
|
||||
"span": "c",
|
||||
"string.h": "c",
|
||||
"chrono": "c"
|
||||
}
|
||||
}
|
||||
78
Makefile
78
Makefile
@@ -1,45 +1,47 @@
|
||||
FIRMWARE_ADDRESS = 0x10001000
|
||||
FIRMWARE_ADDRESS = 0x10001500
|
||||
WORK_AREA_START = 0x10005000
|
||||
BUFFER_ADDRESS = 0x10008000
|
||||
BUFFER_SIZE = 262144
|
||||
BUFFER_SIZE = 204800
|
||||
FLASH_SECTOR_SIZE = 4096
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||||
RAM_SIZE = 15104
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||||
|
||||
all:
|
||||
arm-none-eabi-gcc -Wall -g -Os -mlittle-endian -mlong-calls -mthumb -mcpu=cortex-m3 -mfloat-abi=soft -mthumb-interwork -ffunction-sections -ffreestanding -fsingle-precision-constant -Wstrict-aliasing=0 -Wl,-T,rtl8710.ld -nostartfiles -nostdlib -u main -Wl,--section-start=.text=$(FIRMWARE_ADDRESS) -DBUFFER_ADDRESS=$(BUFFER_ADDRESS) rtl8710_flasher.c spi_flash.c -o rtl8710_flasher.elf
|
||||
arm-none-eabi-objcopy -O binary rtl8710_flasher.elf rtl8710_flasher.bin
|
||||
gcc make_array.c -o make_array
|
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echo "#" >rtl8710.ocd
|
||||
echo "# OpenOCD script for RTL8710" >>rtl8710.ocd
|
||||
echo "# Copyright (C) 2016 Rebane, rebane@alkohol.ee" >>rtl8710.ocd
|
||||
echo "#" >>rtl8710.ocd
|
||||
echo >>rtl8710.ocd
|
||||
cat rtl8710_cpu.tcl >>rtl8710.ocd
|
||||
echo "set rtl8710_flasher_firmware_ptr $(FIRMWARE_ADDRESS)" >>rtl8710.ocd
|
||||
echo "set rtl8710_flasher_buffer $(BUFFER_ADDRESS)" >>rtl8710.ocd
|
||||
echo "set rtl8710_flasher_buffer_size $(BUFFER_SIZE)" >>rtl8710.ocd
|
||||
echo "set rtl8710_flasher_sector_size $(FLASH_SECTOR_SIZE)" >>rtl8710.ocd
|
||||
echo >>rtl8710.ocd
|
||||
echo "array set rtl8710_flasher_code {" >>rtl8710.ocd
|
||||
./make_array <rtl8710_flasher.bin >>rtl8710.ocd
|
||||
echo "}" >>rtl8710.ocd
|
||||
echo >>rtl8710.ocd
|
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cat rtl8710_flasher.tcl >>rtl8710.ocd
|
||||
cp rtl8710.ocd script/rtl8710.ocd
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||||
CC = arm-none-eabi-gcc
|
||||
OBJCOPY = arm-none-eabi-objcopy
|
||||
|
||||
LD_FILE = rtl8710.ld
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||||
|
||||
CFLAGS = -mcpu=cortex-m4 -mthumb -Os -flto \
|
||||
-nostartfiles -ffreestanding \
|
||||
-ffunction-sections -fdata-sections -Wl,--gc-sections \
|
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-Wl,-T,$(LD_FILE) -u main \
|
||||
-Wl,--defsym=_RAM_ORIGIN=$(FIRMWARE_ADDRESS) \
|
||||
-Wl,--defsym=_RAM_SIZE=$(RAM_SIZE) \
|
||||
-Wl,--defsym=_WORK_AREA_START=$(WORK_AREA_START) \
|
||||
-DBUFFER_ADDRESS=$(BUFFER_ADDRESS) \
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||||
-DFLASH_SECTOR_SIZE=$(FLASH_SECTOR_SIZE)
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||||
|
||||
SRC = rtl8710_flasher.c
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||||
TARGET = rtl8710_flasher
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||||
|
||||
# generate OpenOCD script with embedded flasher bin
|
||||
script/rtl8710.ocd: $(TARGET).bin rtl8710_cpu.tcl rtl8710_flasher.tcl
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||||
cat rtl8710_cpu.tcl > $@
|
||||
FIRMWARE_ADDRESS=$(FIRMWARE_ADDRESS) \
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||||
BUFFER_ADDRESS=$(BUFFER_ADDRESS) \
|
||||
BUFFER_SIZE=$(BUFFER_SIZE) \
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||||
FLASH_SECTOR_SIZE=$(FLASH_SECTOR_SIZE) \
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||||
./generate_ocd.sh $< >> $@
|
||||
cat rtl8710_flasher.tcl >> $@
|
||||
|
||||
$(TARGET).bin: $(TARGET).elf
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||||
$(OBJCOPY) -O binary $< $@
|
||||
|
||||
$(TARGET).elf: $(SRC)
|
||||
$(CC) $(CFLAGS) $^ -o $@
|
||||
|
||||
clean:
|
||||
rm -rf rtl8710_flasher.elf rtl8710_flasher.bin make_array rtl8710.ocd
|
||||
rm -f $(TARGET).elf $(TARGET).bin script/rtl8710.ocd
|
||||
|
||||
test:
|
||||
openocd -f interface/stlink-v2-1.cfg -f script/rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "shutdown"
|
||||
|
||||
dump:
|
||||
openocd -f interface/stlink-v2-1.cfg -f script/rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "rtl8710_flash_read dump.bin 0 1048576" -c "shutdown"
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||||
|
||||
restore:
|
||||
openocd -f interface/stlink-v2-1.cfg -f script/rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write dump.bin 0" -c shutdown
|
||||
|
||||
verify:
|
||||
openocd -f interface/stlink-v2-1.cfg -f script/rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_flash_verify dump.bin 0" -c shutdown
|
||||
|
||||
reset:
|
||||
openocd -f interface/stlink-v2-1.cfg -f script/rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_reboot" -c shutdown
|
||||
include rtl8710-openocd.mk
|
||||
|
||||
.PHONY: rtl-test rtl-mac rtl-dump rtl-full-erase rtl-restore rtl-restore-nae rtl-verify rtl-reset clean
|
||||
|
||||
134
README.md
134
README.md
@@ -1,43 +1,113 @@
|
||||
# RTL-8710 openocd support
|
||||
OpenOCD support for RTL8710 and integrated flash.
|
||||
|
||||
OpenOCD support for RTL8710 and integrated flash.
|
||||
Uses and links against ROM functions, they're there anyway so whatever, we get a smaller flasher binary and codebase this way too.
|
||||
|
||||
## pins:
|
||||
|
||||
### SWD
|
||||
* SWDIO: GE3
|
||||
* SWCLK: GE4
|
||||
|
||||
- SWDIO: GE3
|
||||
- SWCLK: GE4
|
||||
|
||||
### JTAG
|
||||
* TRST: GE0
|
||||
* TDI: GE1
|
||||
* TDO: GE2
|
||||
* TMS: GE3
|
||||
* TCK: GE4
|
||||
|
||||
- TRST: GE0
|
||||
- TDI: GE1
|
||||
- TDO: GE2
|
||||
- TMS: GE3
|
||||
- TCK: GE4
|
||||
|
||||
## building:
|
||||
|
||||
```
|
||||
make
|
||||
```
|
||||
## available OpenOCD commands:
|
||||
### rtl8710_flash_read_id
|
||||
read and parse the jedec id bytes from flash
|
||||
### rtl8710_flash_mass_erase
|
||||
erase whole flash
|
||||
### rtl8710_flash_read [filename] [offset] [size]
|
||||
dump (size) bytes from flash offset (offset) to file (filename)
|
||||
### rtl8710_flash_write [filename] [offset]
|
||||
write file (filename) to flash offset (offset)
|
||||
### rtl8710_flash_verify [filename] [offset]
|
||||
compare file (filename) with flash offset (offset)
|
||||
### rtl8710_flash_auto_erase [1/0]
|
||||
set auto_erase option on/off. flash sectors will be autoerased when writing
|
||||
### rtl8710_flash_auto_verify [1/0]
|
||||
set auto_verify option on/off. each block of data will be auto verified when writing
|
||||
## examples:
|
||||
|
||||
# RTL8710 OpenOCD Commands
|
||||
|
||||
### Core Functions
|
||||
|
||||
- `rtl8710_flasher_init`
|
||||
init flasher, loads firmware and reads flash ID to determine capacity
|
||||
|
||||
- `rtl8710_flasher_mrw [reg]`
|
||||
reads 32-bit value from specified register
|
||||
|
||||
- `rtl8710_flasher_wait`
|
||||
polls control register at `buffer + 0x00` until operation completes
|
||||
|
||||
- `rtl8710_flasher_load_block [filename] [offset] [length]`
|
||||
loads data block from file into buffer at `buffer + 0x20`
|
||||
|
||||
- `rtl8710_flasher_block [command] [offset] [len]`
|
||||
internal function for read/write/verify operations. Command must be `"read"`, `"write"` or `"verify"`
|
||||
|
||||
### Block Operations
|
||||
|
||||
- `rtl8710_flasher_read_block [offset] [len]`
|
||||
reads block from flash into buffer
|
||||
|
||||
- `rtl8710_flasher_write_block [offset] [len]`
|
||||
writes buffer contents to flash
|
||||
|
||||
- `rtl8710_flasher_verify_block [offset] [len]`
|
||||
verifies flash contents against buffer
|
||||
|
||||
### Flash Commands
|
||||
|
||||
- `rtl8710_flash_read_id`
|
||||
reads JEDEC ID and displays manufacturer ID, memory type and capacity
|
||||
|
||||
- `rtl8710_flash_read_mac`
|
||||
reads MAC address from flash offset `0xA088`
|
||||
|
||||
- `rtl8710_flash_erase [type] [offset]`
|
||||
erases flash memory. Type must be `"mass"` or `"sector"`. For sector erase, specify offset
|
||||
|
||||
- `rtl8710_flash_mass_erase`
|
||||
performs mass erase of entire flash chip
|
||||
|
||||
- `rtl8710_flash_sector_erase [offset]`
|
||||
erases single sector at specified offset
|
||||
|
||||
- `rtl8710_flash_read [filename] [offset] [size]`
|
||||
reads `size` bytes from flash at `offset` to `filename`
|
||||
|
||||
- `rtl8710_flash_write [filename] [offset]`
|
||||
writes file to flash at `offset`, using configured buffer size chunks
|
||||
|
||||
- `rtl8710_flash_verify [filename] [offset]`
|
||||
verifies flash contents against file at `offset`, using configured buffer size chunks
|
||||
|
||||
### Configuration
|
||||
|
||||
- `rtl8710_flash_auto_erase [1/0]`
|
||||
enables/disables automatic sector erase before write operations
|
||||
|
||||
- `rtl8710_flash_auto_verify [1/0]`
|
||||
enables/disables automatic verification after write operations
|
||||
|
||||
### System Control
|
||||
|
||||
- `rtl8710_reboot`
|
||||
triggers system reboot by writing `0x05FA0007` to AIRCR register @ `0xE000ED0C`
|
||||
|
||||
## Example Usage
|
||||
|
||||
```bash
|
||||
# Read 1MB from flash
|
||||
openocd -f interface/stlink-v2-1.cfg -f rtl8710.ocd -c "init" -c "reset halt" \
|
||||
-c "rtl8710_flash_read_id" -c "rtl8710_flash_read dump.bin 0 1048576" -c "shutdown"
|
||||
|
||||
# write to flash with auto erase/verify
|
||||
openocd -f interface/stlink-v2-1.cfg -f rtl8710.ocd -c "init" -c "reset halt" \
|
||||
-c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \
|
||||
-c "rtl8710_flash_write dump.bin 0" -c "shutdown"
|
||||
```
|
||||
openocd -f interface/stlink-v2-1.cfg -f rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "rtl8710_flash_read dump.bin 0 1048576" -c "shutdown"
|
||||
```
|
||||
```
|
||||
openocd -f interface/stlink-v2-1.cfg -f rtl8710.ocd -c "init" -c "reset halt" -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write dump.bin 0" -c "shutdown"
|
||||
```
|
||||
## About
|
||||
RTL8710 OpenOCD support is created by Rebane (rebane@alkohol.ee)
|
||||
|
||||
# About
|
||||
|
||||
RTL8710 OpenOCD support based on work by Rebane (rebane@alkohol.ee)
|
||||
|
||||
This document and the attached source code is released under GPLv2.
|
||||
|
||||
|
||||
2
TODO.txt
2
TODO.txt
@@ -2,4 +2,4 @@ TESTING
|
||||
better documentation
|
||||
error handling
|
||||
timeout handling
|
||||
|
||||
-work-area-phys, cpu/flasher tcl split sucks
|
||||
1427
export-rom_symbol_v01.txt
Normal file
1427
export-rom_symbol_v01.txt
Normal file
File diff suppressed because it is too large
Load Diff
16
generate_ocd.sh
Executable file
16
generate_ocd.sh
Executable file
@@ -0,0 +1,16 @@
|
||||
#!/bin/sh
|
||||
|
||||
if [ $# -ne 1 ]; then
|
||||
echo "Usage: $0 <binary_file>" >&2
|
||||
exit 1
|
||||
fi
|
||||
|
||||
printf "set rtl8710_flasher_firmware_ptr %s\n" "$FIRMWARE_ADDRESS"
|
||||
printf "set rtl8710_flasher_buffer %s\n" "$BUFFER_ADDRESS"
|
||||
printf "set rtl8710_flasher_buffer_size %s\n" "$BUFFER_SIZE"
|
||||
printf "set rtl8710_flasher_sector_size %s\n" "$FLASH_SECTOR_SIZE"
|
||||
printf "\n"
|
||||
|
||||
printf "set rtl8710_flasher_code [list "
|
||||
hexdump -v -e '1/4 "0x%08x "' "$1"
|
||||
printf "]\n\n"
|
||||
22
make_array.c
22
make_array.c
@@ -1,22 +0,0 @@
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <unistd.h>
|
||||
|
||||
int main(){
|
||||
ssize_t i, l;
|
||||
uint32_t value, index;
|
||||
uint8_t buffer[24];
|
||||
index = 0;
|
||||
while(1){
|
||||
l = read(0, buffer, 24);
|
||||
if(l < 1)break;
|
||||
printf("\t");
|
||||
for(i = 0; i < l; i += 4){
|
||||
value = ((uint32_t)buffer[i + 0] << 0) | ((uint32_t)buffer[i + 1] << 8) | ((uint32_t)buffer[i + 2] << 16) | ((uint32_t)buffer[i + 3] << 24);
|
||||
if(i)printf(" ");
|
||||
printf("%d 0x%08X", index++, (unsigned int)value);
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
|
||||
19
mask.h
19
mask.h
@@ -1,19 +0,0 @@
|
||||
#ifndef _MASK_H_
|
||||
#define _MASK_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define mask8(mask, value) ((((uint8_t)(value)) << __builtin_ctz((mask))) & ((uint8_t)(mask)))
|
||||
#define mask8_set(target, mask, value) do{ (target) = ((target) & ~((uint8_t)(mask))) | mask8(mask, value); }while(0)
|
||||
#define mask8_get(target, mask) (((target) & ((uint8_t)(mask))) >> __builtin_ctz((mask)))
|
||||
|
||||
#define mask16(mask, value) ((((uint16_t)(value)) << __builtin_ctz((mask))) & ((uint16_t)(mask)))
|
||||
#define mask16_set(target, mask, value) do{ (target) = ((target) & ~((uint16_t)(mask))) | mask16(mask, value); }while(0)
|
||||
#define mask16_get(target, mask) (((target) & ((uint16_t)(mask))) >> __builtin_ctz((mask)))
|
||||
|
||||
#define mask32(mask, value) ((((uint32_t)(value)) << __builtin_ctz((mask))) & ((uint32_t)(mask)))
|
||||
#define mask32_set(target, mask, value) do{ (target) = ((target) & ~((uint32_t)(mask))) | mask32(mask, value); }while(0)
|
||||
#define mask32_get(target, mask) (((target) & ((uint32_t)(mask))) >> __builtin_ctz((mask)))
|
||||
|
||||
#endif
|
||||
|
||||
31
rtl8710-openocd.mk
Normal file
31
rtl8710-openocd.mk
Normal file
@@ -0,0 +1,31 @@
|
||||
# override if importing as submodule
|
||||
RTL8710_PATH ?= .
|
||||
RTL8710_SCRIPT_PATH ?= $(RTL8710_PATH)/script
|
||||
|
||||
INTERFACE ?= stlink
|
||||
|
||||
OPENOCD_BASE = openocd -f interface/$(INTERFACE).cfg -f $(RTL8710_SCRIPT_PATH)/rtl8710.ocd -c "init" -c "reset" -c "halt"
|
||||
|
||||
rtl-test:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_read_id" -c "shutdown"
|
||||
|
||||
rtl-mac:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_read_mac" -c "shutdown"
|
||||
|
||||
rtl-dump:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_read_id" -c "rtl8710_flash_read dump.bin 0 1048576" -c "shutdown"
|
||||
|
||||
rtl-full-erase:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_mass_erase" -c shutdown
|
||||
|
||||
rtl-restore:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write dump.bin 0" -c shutdown
|
||||
|
||||
rtl-restore-nae:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_auto_erase 0" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write dump.bin 0" -c shutdown
|
||||
|
||||
rtl-verify:
|
||||
$(OPENOCD_BASE) -c "rtl8710_flash_verify dump.bin 0" -c shutdown
|
||||
|
||||
rtl-reset:
|
||||
$(OPENOCD_BASE) -c "rtl8710_reboot" -c shutdown
|
||||
289
rtl8710.h
289
rtl8710.h
@@ -1,289 +0,0 @@
|
||||
#ifndef _RTL8710_H_
|
||||
#define _RTL8710_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct{
|
||||
volatile uint32_t CTRLR0;
|
||||
volatile uint32_t CTRLR1;
|
||||
volatile uint32_t SSIENR;
|
||||
volatile uint32_t MWCR;
|
||||
volatile uint32_t SER;
|
||||
volatile uint32_t BAUDR;
|
||||
volatile uint32_t TXFTLR;
|
||||
volatile uint32_t RXFTLR;
|
||||
volatile uint32_t TXFLR;
|
||||
volatile uint32_t RXFLR;
|
||||
volatile uint32_t SR;
|
||||
volatile uint32_t IMR;
|
||||
volatile uint32_t ISR;
|
||||
volatile uint32_t RISR;
|
||||
volatile uint32_t TXOICR;
|
||||
volatile uint32_t RXOICR;
|
||||
volatile uint32_t RXUICR;
|
||||
volatile uint32_t MSTICR;
|
||||
volatile uint32_t ICR;
|
||||
volatile uint32_t DMACR;
|
||||
volatile uint32_t DMATDLR;
|
||||
volatile uint32_t DMARDLR;
|
||||
volatile uint32_t IDR;
|
||||
volatile uint32_t SSI_COMP_VERSION;
|
||||
union{
|
||||
struct{
|
||||
union{
|
||||
volatile uint8_t DR;
|
||||
volatile uint8_t DR8;
|
||||
};
|
||||
uint8_t RESERVED1[3];
|
||||
}__attribute__((packed));
|
||||
struct{
|
||||
volatile uint16_t DR16;
|
||||
uint16_t RESERVED2[1];
|
||||
}__attribute__((packed));
|
||||
volatile uint32_t DR32;
|
||||
};
|
||||
uint32_t RESERVED3[31];
|
||||
volatile uint32_t READ_FAST_SINGLE;
|
||||
volatile uint32_t READ_DUAL_DATA;
|
||||
volatile uint32_t READ_DUAL_ADDR_DATA;
|
||||
volatile uint32_t READ_QUAD_DATA;
|
||||
union{
|
||||
volatile uint32_t READ_QUAD_ADDR_DATA;
|
||||
volatile uint32_t RX_SAMPLE_DLY;
|
||||
};
|
||||
volatile uint32_t WRITE_SIGNLE;
|
||||
volatile uint32_t WRITE_DUAL_DATA;
|
||||
volatile uint32_t WRITE_DUAL_ADDR_DATA;
|
||||
volatile uint32_t WRITE_QUAD_DATA;
|
||||
volatile uint32_t WRITE_QUAD_ADDR_DATA;
|
||||
volatile uint32_t WRITE_ENABLE;
|
||||
volatile uint32_t READ_STATUS;
|
||||
volatile uint32_t CTRLR2;
|
||||
volatile uint32_t FBAUDR;
|
||||
volatile uint32_t ADDR_LENGTH;
|
||||
volatile uint32_t AUTO_LENGTH;
|
||||
volatile uint32_t VALID_CMD;
|
||||
volatile uint32_t FLASE_SIZE;
|
||||
volatile uint32_t FLUSH_FIFO;
|
||||
}__attribute__((packed)) SPI_TypeDef;
|
||||
|
||||
#define SPI_FLASH ((SPI_TypeDef *)0x40006000)
|
||||
|
||||
// SPI_CTRLR0
|
||||
#define SPI_CTRLR0_FRF (((uint32_t)0x03) << 4)
|
||||
#define SPI_CTRLR0_SCPH (((uint32_t)0x01) << 6)
|
||||
#define SPI_CTRLR0_SCPOL (((uint32_t)0x01) << 7)
|
||||
#define SPI_CTRLR0_TMOD (((uint32_t)0x03) << 8)
|
||||
#define SPI_CTRLR0_SLV_OE (((uint32_t)0x01) << 10)
|
||||
#define SPI_CTRLR0_SRL (((uint32_t)0x01) << 11)
|
||||
#define SPI_CTRLR0_CFS (((uint32_t)0x0F) << 12)
|
||||
#define SPI_CTRLR0_ADDR_CH (((uint32_t)0x03) << 16)
|
||||
#define SPI_CTRLR0_DATA_CH (((uint32_t)0x03) << 18)
|
||||
#define SPI_CTRLR0_CMD_CH (((uint32_t)0x03) << 20)
|
||||
#define SPI_CTRLR0_FAST_RD (((uint32_t)0x01) << 22)
|
||||
#define SPI_CTRLR0_SHIFT_CK_MTIMES (((uint32_t)0x1F) << 23)
|
||||
|
||||
// SPI_SER
|
||||
#define SPI_SER_SS0 (((uint32_t)0x01) << 0)
|
||||
#define SPI_SER_SS1 (((uint32_t)0x01) << 1)
|
||||
#define SPI_SER_SS2 (((uint32_t)0x01) << 2)
|
||||
|
||||
// SPI_SR
|
||||
#define SPI_SR_SSI (((uint32_t)0x01) << 0)
|
||||
#define SPI_SR_TFNF (((uint32_t)0x01) << 1)
|
||||
#define SPI_SR_TFE (((uint32_t)0x01) << 2)
|
||||
#define SPI_SR_RFNE (((uint32_t)0x01) << 3)
|
||||
#define SPI_SR_RFF (((uint32_t)0x01) << 4)
|
||||
#define SPI_SR_TXE (((uint32_t)0x01) << 5)
|
||||
|
||||
typedef struct{
|
||||
volatile uint32_t PEON_PWR_CTRL; // 0x0200
|
||||
volatile uint32_t PON_ISO_CTRL; // 0x0204
|
||||
uint32_t RESERVED1[2];
|
||||
volatile uint32_t SOC_FUNC_EN; // 0x0210
|
||||
volatile uint32_t SOC_HCI_COM_FUNC_EN; // 0x0214
|
||||
volatile uint32_t SOC_PERI_FUNC0_EN; // 0x0218
|
||||
volatile uint32_t SOC_PERI_FUNC1_EN; // 0x021C
|
||||
volatile uint32_t SOC_PERI_DB_FUNC0_EN; // 0x0220
|
||||
uint32_t RESERVED2[3];
|
||||
volatile uint32_t PESOC_CLK_CTRL; // 0x0230
|
||||
volatile uint32_t PESOC_PERI_CLK_CTRL0; // 0x0234
|
||||
volatile uint32_t PESOC_PERI_CLK_CTRL1; // 0x0238
|
||||
volatile uint32_t PESOC_CLK_CTRL3; // 0x023C
|
||||
volatile uint32_t PESOC_HCI_CLK_CTRL0; // 0x0240
|
||||
volatile uint32_t PESOC_COM_CLK_CTRL1; // 0x0244
|
||||
volatile uint32_t PESOC_HW_ENG_CLK_CTRL; // 0x0248
|
||||
uint32_t RESERVED3[1];
|
||||
volatile uint32_t PESOC_CLK_SEL; // 0x0250
|
||||
uint32_t RESERVED4[6];
|
||||
volatile uint32_t SYS_ANACK_CAL_CTRL; // 0x026C
|
||||
volatile uint32_t OSC32K_CTRL; // 0x0270
|
||||
volatile uint32_t OSC32K_REG_CTRL0; // 0x0274
|
||||
volatile uint32_t OSC32K_REG_CTRL1; // 0x0278
|
||||
volatile uint32_t THERMAL_METER_CTRL; // 0x027C
|
||||
volatile uint32_t UART_MUX_CTRL; // 0x0280
|
||||
volatile uint32_t SPI_MUX_CTRL; // 0x0284
|
||||
volatile uint32_t I2C_MUX_CTRL; // 0x0288
|
||||
volatile uint32_t I2S_MUX_CTRL; // 0x028C
|
||||
uint32_t RESERVED5[4];
|
||||
volatile uint32_t HCI_PINMUX_CTRL; // 0x02A0
|
||||
volatile uint32_t WL_PINMUX_CTRL; // 0x02A4
|
||||
volatile uint32_t BT_PINMUX_CTRL; // 0x02A8
|
||||
volatile uint32_t PWM_PINMUX_CTRL; // 0x02AC
|
||||
uint32_t RESERVED6[4];
|
||||
volatile uint32_t CPU_PERIPHERAL_CTRL; // 0x02C0
|
||||
uint32_t RESERVED7[7];
|
||||
volatile uint32_t HCI_CTRL_STATUS_0; // 0x02E0
|
||||
volatile uint32_t HCI_CTRL_STATUS_1; // 0x02E4
|
||||
uint32_t RESERVED8[6];
|
||||
volatile uint32_t PESOC_MEM_CTRL; // 0x0300
|
||||
volatile uint32_t PESOC_SOC_CTRL; // 0x0304
|
||||
volatile uint32_t PESOC_PERI_CTRL; // 0x0308
|
||||
uint32_t RESERVED9[5];
|
||||
volatile uint32_t GPIO_SHTDN_CTRL; // 0x0320
|
||||
volatile uint32_t GPIO_DRIVING_CTRL; // 0x0324
|
||||
uint32_t RESERVED10[2];
|
||||
volatile uint32_t GPIO_PULL_CTRL0; // 0x0330
|
||||
volatile uint32_t GPIO_PULL_CTRL1; // 0x0334
|
||||
volatile uint32_t GPIO_PULL_CTRL2; // 0x0338
|
||||
volatile uint32_t GPIO_PULL_CTRL3; // 0x033C
|
||||
volatile uint32_t GPIO_PULL_CTRL4; // 0x0340
|
||||
volatile uint32_t GPIO_PULL_CTRL5; // 0x0344
|
||||
volatile uint32_t GPIO_PULL_CTRL6; // 0x0348
|
||||
uint32_t RESERVED11[5];
|
||||
volatile uint32_t PERI_PWM0_CTRL; // 0x0360
|
||||
volatile uint32_t PERI_PWM1_CTRL; // 0x0364
|
||||
volatile uint32_t PERI_PWM2_CTRL; // 0x0368
|
||||
volatile uint32_t PERI_PWM3_CTRL; // 0x036C
|
||||
volatile uint32_t PERI_TIM_EVT_CTRL; // 0x0370
|
||||
volatile uint32_t PERI_EGTIM_CTRL; // 0x0374
|
||||
uint32_t RESERVED12[30];
|
||||
volatile uint32_t PEON_CFG; // 0x03F0
|
||||
volatile uint32_t PEON_STATUS; // 0x03F4
|
||||
}__attribute__((packed)) PERI_ON_TypeDef;
|
||||
|
||||
#define PERI_ON ((PERI_ON_TypeDef *)0x40000200)
|
||||
|
||||
// PERI_ON_SOC_FUNC_EN
|
||||
#define PERI_ON_SOC_FUNC_EN_FUN (((uint32_t)0x01) << 0)
|
||||
#define PERI_ON_SOC_FUNC_EN_OCP (((uint32_t)0x01) << 1)
|
||||
#define PERI_ON_SOC_FUNC_EN_LXBUS (((uint32_t)0x01) << 2)
|
||||
#define PERI_ON_SOC_FUNC_EN_FLASH (((uint32_t)0x01) << 4)
|
||||
#define PERI_ON_SOC_FUNC_EN_MEM_CTRL (((uint32_t)0x01) << 6)
|
||||
#define PERI_ON_SOC_FUNC_EN_CPU (((uint32_t)0x01) << 8)
|
||||
#define PERI_ON_SOC_FUNC_EN_LOG_UART (((uint32_t)0x01) << 12)
|
||||
#define PERI_ON_SOC_FUNC_EN_GDMA0 (((uint32_t)0x01) << 13)
|
||||
#define PERI_ON_SOC_FUNC_EN_GDMA1 (((uint32_t)0x01) << 14)
|
||||
#define PERI_ON_SOC_FUNC_EN_GTIMER (((uint32_t)0x01) << 16)
|
||||
#define PERI_ON_SOC_FUNC_EN_SECURITY_ENGINE (((uint32_t)0x01) << 20)
|
||||
|
||||
// PERI_ON_SOC_PERI_FUNC1_EN
|
||||
#define PERI_ON_SOC_PERI_FUNC1_EN_ADC0 (((uint32_t)0x01) << 0)
|
||||
#define PERI_ON_SOC_PERI_FUNC1_EN_DAC0 (((uint32_t)0x01) << 4)
|
||||
#define PERI_ON_SOC_PERI_FUNC1_EN_DAC1 (((uint32_t)0x01) << 5)
|
||||
#define PERI_ON_SOC_PERI_FUNC1_EN_GPIO (((uint32_t)0x01) << 8)
|
||||
|
||||
// PERI_ON_PESOC_CLK_CTRL
|
||||
#define PERI_ON_CLK_CTRL_CKE_OCP (((uint32_t)0x01) << 0)
|
||||
#define PERI_ON_CLK_CTRL_CKE_PLFM (((uint32_t)0x01) << 2)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_TRACE_EN (((uint32_t)0x01) << 4)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_TRACE_EN (((uint32_t)0x01) << 5)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_VENDOR_REG_EN (((uint32_t)0x01) << 6)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_VENDOR_REG_EN (((uint32_t)0x01) << 7)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_FLASH_EN (((uint32_t)0x01) << 8)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_FLASH_EN (((uint32_t)0x01) << 9)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_SDR_EN (((uint32_t)0x01) << 10)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_SDR_EN (((uint32_t)0x01) << 11)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_LOG_UART_EN (((uint32_t)0x01) << 12)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_LOG_UART_EN (((uint32_t)0x01) << 13)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_TIMER_EN (((uint32_t)0x01) << 14)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_TIMER_EN (((uint32_t)0x01) << 15)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_GDMA0_EN (((uint32_t)0x01) << 16)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_GDMA0_EN (((uint32_t)0x01) << 17)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_GDMA1_EN (((uint32_t)0x01) << 18)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_GDMA1_EN (((uint32_t)0x01) << 19)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_GPIO_EN (((uint32_t)0x01) << 24)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_GPIO_EN (((uint32_t)0x01) << 25)
|
||||
#define PERI_ON_CLK_CTRL_ACTCK_BTCMD_EN (((uint32_t)0x01) << 28)
|
||||
#define PERI_ON_CLK_CTRL_SLPCK_BTCMD_EN (((uint32_t)0x01) << 29)
|
||||
|
||||
// PERI_ON_CPU_PERIPHERAL_CTRL
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_SPI_FLASH_PIN_EN (((uint32_t)0x01) << 0)
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_SPI_FLASH_PIN_SEL (((uint32_t)0x03) << 1)
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_SDR_PIN_EN (((uint32_t)0x01) << 4)
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_TRACE_PIN_EN (((uint32_t)0x01) << 17)
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_LOG_UART_PIN_EN (((uint32_t)0x01) << 20)
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_LOG_UART_IR_EN (((uint32_t)0x01) << 21)
|
||||
#define PERI_ON_CPU_PERIPHERAL_CTRL_LOG_UART_PIN_SEL (((uint32_t)0x03) << 22)
|
||||
|
||||
typedef struct{
|
||||
union{
|
||||
volatile uint32_t RBR;
|
||||
volatile uint32_t THR;
|
||||
volatile uint32_t DLL;
|
||||
volatile uint32_t RBR_THR_DLL;
|
||||
};
|
||||
union{
|
||||
volatile uint32_t IER;
|
||||
volatile uint32_t DLH;
|
||||
volatile uint32_t IER_DLH;
|
||||
};
|
||||
union{
|
||||
volatile uint32_t IIR;
|
||||
volatile uint32_t FCR;
|
||||
volatile uint32_t IIR_FCR;
|
||||
};
|
||||
volatile uint32_t LCR;
|
||||
volatile uint32_t MCR;
|
||||
volatile uint32_t LSR;
|
||||
volatile uint32_t MSR;
|
||||
uint32_t RESERVED1[24];
|
||||
volatile uint32_t USR;
|
||||
}__attribute__((packed)) LOG_UART_TypeDef;
|
||||
|
||||
#define LOG_UART ((LOG_UART_TypeDef *)0x40003000)
|
||||
|
||||
// LOG_UART_IER
|
||||
#define LOG_UART_IER_ERBFI (((uint32_t)0x01) << 0)
|
||||
#define LOG_UART_IER_ETBEI (((uint32_t)0x01) << 1)
|
||||
#define LOG_UART_IER_ELSI (((uint32_t)0x01) << 2)
|
||||
#define LOG_UART_IER_EDSSI (((uint32_t)0x01) << 3)
|
||||
|
||||
// LOG_UART_FCR
|
||||
#define LOG_UART_FCR_FIFOE (((uint32_t)0x01) << 0)
|
||||
#define LOG_UART_FCR_RFIFOR (((uint32_t)0x01) << 1)
|
||||
#define LOG_UART_FCR_XFIFOR (((uint32_t)0x01) << 2)
|
||||
#define LOG_UART_FCR_DMAM (((uint32_t)0x01) << 3)
|
||||
#define LOG_UART_FCR_TET (((uint32_t)0x03) << 4)
|
||||
#define LOG_UART_FCR_RT (((uint32_t)0x03) << 6)
|
||||
|
||||
// LOG_UART_LCR
|
||||
#define LOG_UART_LCR_DLS (((uint32_t)0x03) << 0)
|
||||
#define LOG_UART_LCR_STOP (((uint32_t)0x01) << 2)
|
||||
#define LOG_UART_LCR_PEN (((uint32_t)0x01) << 3)
|
||||
#define LOG_UART_LCR_EPS (((uint32_t)0x01) << 4)
|
||||
#define LOG_UART_LCR_STICK_PAR (((uint32_t)0x01) << 5)
|
||||
#define LOG_UART_LCR_BC (((uint32_t)0x01) << 6)
|
||||
#define LOG_UART_LCR_DLAB (((uint32_t)0x01) << 7)
|
||||
|
||||
// LOG_UART_MCR
|
||||
#define LOG_UART_MCR_DTR (((uint32_t)0x01) << 0)
|
||||
#define LOG_UART_MCR_RTS (((uint32_t)0x01) << 1)
|
||||
#define LOG_UART_MCR_OUT1 (((uint32_t)0x01) << 2)
|
||||
#define LOG_UART_MCR_OUT2 (((uint32_t)0x01) << 3)
|
||||
#define LOG_UART_MCR_LOOPBACK (((uint32_t)0x01) << 4)
|
||||
#define LOG_UART_MCR_AFCE (((uint32_t)0x01) << 5)
|
||||
|
||||
// LOG_UART_LSR
|
||||
#define LOG_UART_LSR_DR (((uint32_t)0x01) << 0)
|
||||
#define LOG_UART_LSR_OE (((uint32_t)0x01) << 1)
|
||||
#define LOG_UART_LSR_PE (((uint32_t)0x01) << 2)
|
||||
#define LOG_UART_LSR_FE (((uint32_t)0x01) << 3)
|
||||
#define LOG_UART_LSR_BI (((uint32_t)0x01) << 4)
|
||||
#define LOG_UART_LSR_THRE (((uint32_t)0x01) << 5)
|
||||
#define LOG_UART_LSR_TEMT (((uint32_t)0x01) << 6)
|
||||
#define LOG_UART_LSR_RFE (((uint32_t)0x01) << 7)
|
||||
#define LOG_UART_LSR_ADDR_RCVD (((uint32_t)0x01) << 8)
|
||||
|
||||
#endif
|
||||
|
||||
44
rtl8710.ld
44
rtl8710.ld
@@ -1,19 +1,33 @@
|
||||
MEMORY{
|
||||
tcm (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64k
|
||||
ram (rwx) : ORIGIN = 0x10000000, LENGTH = 448k
|
||||
/* from https://github.com/ambiot/amb1_sdk/blob/master/project/realtek_amebaz_va0_example/GCC-RELEASE/export-rom_symbol_v01.txt */
|
||||
INCLUDE "export-rom_symbol_v01.txt"
|
||||
|
||||
MEMORY {
|
||||
ram (rwx) : ORIGIN = _RAM_ORIGIN, LENGTH = _RAM_SIZE
|
||||
}
|
||||
|
||||
PROVIDE(STACK_TOP = 0x1FFF0000 + 64k);
|
||||
ASSERT(_RAM_ORIGIN + _RAM_SIZE <= _WORK_AREA_START, "Firmware overlaps with OpenOCD work area!")
|
||||
|
||||
SECTIONS{
|
||||
.text : { __text_beg__ = . ; *(.vectors*) *(.header) *(.text) *(.text*) *(.rodata) *(.rodata*) *(.glue_7) *(.glue_7t) *(.eh_frame) *(.ARM.extab*) . = ALIGN(4); __text_end__ = . ; } >ram
|
||||
.data : { . = ALIGN(4); __data_beg__ = . ; *(.ram_vectors) *(.data) *(.data*) *(.ram_func) . = ALIGN(4); __data_end__ = . ; } >ram
|
||||
.bss : { . = ALIGN(4); __bss_beg__ = . ; *(.bss) *(COMMON) . = ALIGN(4); __bss_end__ = . ; } >ram
|
||||
__exidx_start = .;
|
||||
.ARM.exidx : { ___exidx_start = . ; *(.ARM.exidx*) ; ___exidx_end = . ; } >ram
|
||||
__exidx_end = .;
|
||||
.ARM.extab : { *(.ARM.extab*) } >ram
|
||||
. = ALIGN(4);
|
||||
end = .; PROVIDE (end = .);
|
||||
SECTIONS {
|
||||
.text : {
|
||||
*(.vectors)
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
. = ALIGN(4);
|
||||
} > ram
|
||||
|
||||
.data : {
|
||||
. = ALIGN(4);
|
||||
*(.data*)
|
||||
. = ALIGN(4);
|
||||
} > ram
|
||||
|
||||
.bss : {
|
||||
. = ALIGN(4);
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
} > ram
|
||||
|
||||
end = .;
|
||||
__end__ = .;
|
||||
}
|
||||
|
||||
|
||||
@@ -1,4 +1,7 @@
|
||||
source [find target/swj-dp.tcl]
|
||||
source [find interface/jlink.cfg]
|
||||
|
||||
adapter driver jlink
|
||||
transport select swd
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
@@ -24,17 +27,17 @@ if { [info exists CPUTAPID] } {
|
||||
set _CPUTAPID 0x2ba01477
|
||||
}
|
||||
|
||||
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||
swd newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
|
||||
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
|
||||
|
||||
$_TARGETNAME configure -work-area-phys 0x10001000 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||||
# todo: get work area from makefile
|
||||
$_TARGETNAME configure -work-area-phys 0x10001500 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||||
|
||||
adapter_khz 500
|
||||
adapter_nsrst_delay 100
|
||||
|
||||
if {![using_hla]} {
|
||||
cortex_m reset_config sysresetreq
|
||||
}
|
||||
adapter speed 3000
|
||||
adapter srst delay 100
|
||||
cortex_m reset_config vectreset
|
||||
|
||||
$_TARGETNAME configure -event reset-init {amebaz_init}
|
||||
|
||||
@@ -1,121 +1,132 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (C) 2016 Rebane, rebane@alkohol.ee
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it under
|
||||
* the terms of the GNU General Public License as published by the Free Software
|
||||
* Foundation; either version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
|
||||
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
|
||||
#include "rtl8710.h"
|
||||
#include "rtl8710_flasher.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include "spi_flash.h"
|
||||
#include <string.h>
|
||||
|
||||
#define MEM_START (*(volatile uint32_t *)(BUFFER_ADDRESS + 0x00))
|
||||
#define MEM_COMMAND (*(volatile uint32_t *)(BUFFER_ADDRESS + 0x04))
|
||||
#define MEM_STATUS (*(volatile uint32_t *)(BUFFER_ADDRESS + 0x08))
|
||||
#define MEM_PARAM (*(volatile uint32_t *)(BUFFER_ADDRESS + 0x0C))
|
||||
#define MEM_OFFSET (*(volatile uint32_t *)(BUFFER_ADDRESS + 0x10))
|
||||
#define MEM_LEN (*(volatile uint32_t *)(BUFFER_ADDRESS + 0x14))
|
||||
#define MEM_DATA ((volatile uint8_t *)(BUFFER_ADDRESS + 0x20))
|
||||
#define printf DiagPrintf
|
||||
|
||||
#define COMMAND_READ_ID 0
|
||||
#define COMMAND_MASS_ERASE 1
|
||||
#define COMMAND_SECTOR_ERASE 2
|
||||
#define COMMAND_READ 3
|
||||
#define COMMAND_WRITE 4
|
||||
#define COMMAND_VERIFY 5
|
||||
|
||||
int __attribute__((section(".vectors"))) main(){
|
||||
uint32_t p, i, l;
|
||||
uint8_t read_buffer[16];
|
||||
|
||||
__asm__("cpsid f");
|
||||
|
||||
PERI_ON->PESOC_CLK_CTRL |= PERI_ON_CLK_CTRL_ACTCK_GPIO_EN | PERI_ON_CLK_CTRL_SLPCK_GPIO_EN; // enable gpio peripheral clock
|
||||
PERI_ON->SOC_PERI_FUNC1_EN |= PERI_ON_SOC_PERI_FUNC1_EN_GPIO; // enable gpio peripheral
|
||||
|
||||
PERI_ON->GPIO_SHTDN_CTRL = 0xFF;
|
||||
PERI_ON->GPIO_DRIVING_CTRL = 0xFF;
|
||||
|
||||
spi_flash_init();
|
||||
|
||||
// read jedec info
|
||||
spi_flash_wait_busy();
|
||||
MEM_PARAM = spi_flash_jedec_id();
|
||||
spi_flash_wait_busy();
|
||||
|
||||
while(1){
|
||||
MEM_START = 0x00000000;
|
||||
while(MEM_START == 0x00000000);
|
||||
if(MEM_COMMAND == COMMAND_READ_ID){
|
||||
MEM_PARAM = 0x00000000;
|
||||
spi_flash_wait_busy();
|
||||
MEM_PARAM = spi_flash_jedec_id();
|
||||
spi_flash_wait_busy();
|
||||
}else if(MEM_COMMAND == COMMAND_MASS_ERASE){
|
||||
spi_flash_wait_busy();
|
||||
spi_flash_cmd(0x06);
|
||||
spi_flash_wait_wel();
|
||||
spi_flash_cmd(0xC7);
|
||||
spi_flash_wait_busy();
|
||||
spi_flash_cmd(0x04);
|
||||
spi_flash_wait_busy();
|
||||
}else if(MEM_COMMAND == COMMAND_SECTOR_ERASE){
|
||||
spi_flash_wait_busy();
|
||||
spi_flash_cmd(0x06);
|
||||
spi_flash_wait_wel();
|
||||
spi_flash_sector_erase(MEM_OFFSET);
|
||||
spi_flash_wait_busy();
|
||||
spi_flash_cmd(0x04);
|
||||
spi_flash_wait_busy();
|
||||
}else if(MEM_COMMAND == COMMAND_READ){
|
||||
spi_flash_wait_busy();
|
||||
p = MEM_OFFSET;
|
||||
for(i = 0; i < MEM_LEN; i += 16, p += 16){
|
||||
spi_flash_read(p, (void *)&MEM_DATA[i], 16);
|
||||
}
|
||||
spi_flash_wait_busy();
|
||||
}else if(MEM_COMMAND == COMMAND_WRITE){
|
||||
for(p = 0; p < MEM_LEN; p += 256){
|
||||
spi_flash_wait_busy();
|
||||
spi_flash_cmd(0x06);
|
||||
spi_flash_wait_wel();
|
||||
spi_flash_write((MEM_OFFSET + p), (void *)&MEM_DATA[p], 256);
|
||||
spi_flash_wait_busy();
|
||||
spi_flash_cmd(0x04);
|
||||
spi_flash_wait_busy();
|
||||
}
|
||||
}else if(MEM_COMMAND == COMMAND_VERIFY){
|
||||
spi_flash_wait_busy();
|
||||
for(p = 0; p < MEM_LEN; p += 16){
|
||||
spi_flash_read((MEM_OFFSET + p), read_buffer, 16);
|
||||
l = MEM_LEN - p;
|
||||
if(l > 16)l = 16;
|
||||
for(i = 0; i < l; i++){
|
||||
if(read_buffer[i] != MEM_DATA[p + i]){
|
||||
break;
|
||||
}
|
||||
}
|
||||
if(i < l){
|
||||
MEM_STATUS = 0x00000001;
|
||||
MEM_PARAM = p;
|
||||
break;
|
||||
}
|
||||
spi_flash_wait_busy();
|
||||
}
|
||||
}else{
|
||||
MEM_STATUS = 0x00000001;
|
||||
}
|
||||
}
|
||||
static void print_flash_info(const uint8_t *flash_id) {
|
||||
printf("[FLASH] Device ID: %02X %02X %02X\n", flash_id[0], flash_id[1],
|
||||
flash_id[2]);
|
||||
printf("[FLASH] Vendor: 0x%08X\n", flash_init_para.vendor_id);
|
||||
printf("[FLASH] Config: Mode=%d, Clock=%d, ReadCmd=0x%02X\n",
|
||||
flash_init_para.current_mode, flash_init_para.clock_div,
|
||||
flash_init_para.current_read_cmd);
|
||||
printf("[FLASH] Timing: SampleDelay=%d, DummyCycles=[%d,%d,%d]\n",
|
||||
flash_init_para.read_sample_delay,
|
||||
flash_init_para.read_dummy_cycles[0],
|
||||
flash_init_para.read_dummy_cycles[1],
|
||||
flash_init_para.read_dummy_cycles[2]);
|
||||
}
|
||||
|
||||
int __attribute__((section(".vectors"))) main(void) {
|
||||
__asm__ volatile("cpsid if");
|
||||
|
||||
uint8_t flash_id[4] = {0};
|
||||
|
||||
// sometimes we boot up and the ROM already inits flash?
|
||||
if (PERI_ON_SOC_FUNC_EN & FLASH_PERIPH_BIT) {
|
||||
printf("[FLASHER] Flash peripheral already enabled...?\n");
|
||||
}
|
||||
|
||||
RCC_PeriphClockCmd(FLASH_PERIPH_BIT, FLASH_CLOCK_BIT, 0);
|
||||
FLASH_ClockDiv(0);
|
||||
RCC_PeriphClockCmd(FLASH_PERIPH_BIT, FLASH_CLOCK_BIT, 1);
|
||||
|
||||
PINMUX_Ctrl(10, 0, 1);
|
||||
FLASH_StructInit_GD(&flash_init_para);
|
||||
FLASH_Init(2);
|
||||
|
||||
FLASH_RxCmd(flash_init_para.cmd_read_id, 3, flash_id);
|
||||
print_flash_info(flash_id);
|
||||
|
||||
/* clear block protection */
|
||||
FLASH_SetStatusBits(0x1c, 0);
|
||||
printf("[FLASH] Block protection cleared\n");
|
||||
Cache_Enable(0);
|
||||
|
||||
while (1) {
|
||||
FLASH_CONTROL->start = 0;
|
||||
while (!FLASH_CONTROL->start) __asm__("nop");
|
||||
|
||||
switch (FLASH_CONTROL->cmd) {
|
||||
case CMD_READ_ID:
|
||||
FLASH_RxCmd(flash_init_para.cmd_read_id, 4, flash_id);
|
||||
FLASH_CONTROL->param = *(uint32_t *)flash_id;
|
||||
break;
|
||||
|
||||
case CMD_MASS_ERASE:
|
||||
FLASH_Erase(0, 0);
|
||||
printf("[FLASHER] Full chip erase completed\n");
|
||||
break;
|
||||
|
||||
case CMD_SECTOR_ERASE:
|
||||
FLASH_Erase(2, FLASH_CONTROL->offset);
|
||||
break;
|
||||
|
||||
case CMD_READ:
|
||||
for (uint32_t i = 0; i < FLASH_CONTROL->len; i += 4) {
|
||||
volatile uint32_t *flash_addr =
|
||||
(volatile uint32_t *)(SPI_FLASH_BASE + FLASH_CONTROL->offset + i);
|
||||
uint32_t *dest = (uint32_t *)&FLASH_CONTROL->data[i];
|
||||
*dest = *flash_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
case CMD_WRITE:
|
||||
printf("[FLASHER] Starting write of %d bytes at offset 0x%08X\n",
|
||||
FLASH_CONTROL->len, FLASH_CONTROL->offset);
|
||||
|
||||
for (uint32_t offset = 0; offset < FLASH_CONTROL->len; offset += 4) {
|
||||
uint32_t write_addr = FLASH_CONTROL->offset + offset;
|
||||
FLASH_TxData12B(write_addr, 4,
|
||||
(uint8_t *)&FLASH_CONTROL->data[offset]);
|
||||
}
|
||||
|
||||
printf("[FLASHER] Write completed successfully\n");
|
||||
break;
|
||||
|
||||
case CMD_VERIFY: {
|
||||
uint8_t tbuf[FLASH_SECTOR_SIZE];
|
||||
uint32_t start_sector = FLASH_CONTROL->offset / FLASH_SECTOR_SIZE;
|
||||
uint32_t end_sector = (FLASH_CONTROL->offset + FLASH_CONTROL->len - 1) /
|
||||
FLASH_SECTOR_SIZE;
|
||||
|
||||
for (uint32_t i = 0; i < FLASH_CONTROL->len; i += 4) {
|
||||
volatile uint32_t *flash_addr =
|
||||
(volatile uint32_t *)(SPI_FLASH_BASE + FLASH_CONTROL->offset + i);
|
||||
*((uint32_t *)tbuf) = *flash_addr;
|
||||
|
||||
size_t l = MIN(4, FLASH_CONTROL->len - i);
|
||||
size_t k;
|
||||
uint32_t current_sector =
|
||||
(FLASH_CONTROL->offset + i) / FLASH_SECTOR_SIZE;
|
||||
if (current_sector > end_sector) {
|
||||
break;
|
||||
}
|
||||
|
||||
for (k = 0; k < l; k++) {
|
||||
if (tbuf[k] != FLASH_CONTROL->data[i + k]) {
|
||||
printf("[VERIFY] mismatch at offset %x: flash=%02x buf=%02x\n",
|
||||
i + k, tbuf[k], FLASH_CONTROL->data[i + k]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (k < l) {
|
||||
FLASH_CONTROL->status = 1;
|
||||
FLASH_CONTROL->param = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
FLASH_CONTROL->status = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
139
rtl8710_flasher.h
Normal file
139
rtl8710_flasher.h
Normal file
@@ -0,0 +1,139 @@
|
||||
#ifndef _RTL8710_FLASHER_H_
|
||||
#define _RTL8710_FLASHER_H_
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#define __always_long_call __attribute__((long_call))
|
||||
#define __packed __attribute__((packed))
|
||||
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
#define BIT(x) (1 << (x))
|
||||
|
||||
#define READ_CHUNK_SIZE 4
|
||||
#define FLASH_WORD_SIZE 4
|
||||
#define VERIFY_CHUNK_SIZE 4
|
||||
#define VERIFY_WORDS (VERIFY_CHUNK_SIZE / FLASH_WORD_SIZE)
|
||||
#ifndef FLASH_SECTOR_SIZE
|
||||
#define FLASH_SECTOR_SIZE 4096
|
||||
#endif
|
||||
|
||||
#define WRITE_CHUNK_SIZE 256
|
||||
|
||||
#define SPI_FLASH_BASE 0x08000000
|
||||
#define PERI_ON_BASE 0x40000200
|
||||
|
||||
#define PERI_ON_SOC_FUNC_EN (*(volatile uint32_t *)(PERI_ON_BASE + 0x10))
|
||||
|
||||
#define FLASH_PERIPH_BIT BIT(4)
|
||||
#define FLASH_CLOCK_BIT BIT(8)
|
||||
|
||||
/* Flash control structure */
|
||||
typedef struct __packed {
|
||||
volatile uint32_t start; /* 0x00: Control register */
|
||||
volatile uint32_t cmd; /* 0x04: Command register */
|
||||
volatile uint32_t status; /* 0x08: Status register */
|
||||
volatile uint32_t param; /* 0x0C: Parameter/ID register */
|
||||
volatile uint32_t offset; /* 0x10: Flash offset */
|
||||
volatile uint32_t len; /* 0x14: Length field */
|
||||
volatile uint32_t reserved; /* 0x18: Padding to maintain 0x20 data offset */
|
||||
volatile uint32_t reserved2; /* 0x1C: Padding to maintain 0x20 data offset */
|
||||
volatile uint8_t data[]; /* 0x20: Data buffer */
|
||||
} flash_control_t;
|
||||
|
||||
#define FLASH_CONTROL ((flash_control_t *)BUFFER_ADDRESS)
|
||||
|
||||
/* Flash commands */
|
||||
typedef enum {
|
||||
CMD_READ_ID = 0, /* Read Flash ID and capacity */
|
||||
CMD_MASS_ERASE = 1, /* Erase entire flash */
|
||||
CMD_SECTOR_ERASE = 2, /* Erase 4KB sector at offset */
|
||||
CMD_READ = 3, /* Read data into buffer */
|
||||
CMD_WRITE = 4, /* Write buffer to flash */
|
||||
CMD_VERIFY = 5, /* Verify buffer against flash */
|
||||
CMD_MAX = 6 /* For bounds checking */
|
||||
} flash_command_t;
|
||||
|
||||
typedef struct {
|
||||
/* Device identification */
|
||||
uint32_t vendor_id; /* Flash vendor ID = 5 */
|
||||
|
||||
/* Operating mode configuration */
|
||||
uint8_t current_mode; /* Current SPI mode (0=single, 1=dual, 2=quad) = 1 */
|
||||
uint8_t clock_div; /* SPI clock divider (spi_clk = oc_clk/(2*div)) = 1 */
|
||||
uint8_t boot_clock_div; /* Boot-time SPI clock divider = 4 */
|
||||
uint32_t current_read_cmd; /* Active read command = 3 */
|
||||
|
||||
/* Status register bits */
|
||||
uint32_t quad_enable_bit; /* Status bit for quad mode = 512 */
|
||||
uint32_t busy_bit; /* Write-in-progress status bit = 1 */
|
||||
uint32_t write_enable_bit; /* Write enable latch bit = 2 */
|
||||
uint32_t has_status2_reg; /* Whether status register 2 exists = 1 */
|
||||
|
||||
/* Timing configuration */
|
||||
uint8_t read_sample_delay; /* Read sampling delay = 1 */
|
||||
uint8_t read_dummy_cycles[3]; /* Dummy cycles for different modes = {0,4,6} */
|
||||
|
||||
/* Read commands */
|
||||
uint32_t read_dual_out; /* Dual output read = 0x3B */
|
||||
uint32_t read_dual_io; /* Dual I/O read = 0xBB */
|
||||
uint32_t read_quad_out; /* Quad output read = 0x6B */
|
||||
uint32_t read_quad_io; /* Quad I/O read = 0xEB */
|
||||
|
||||
/* Write commands */
|
||||
uint32_t write_dual_data; /* Dual data write = 0 */
|
||||
uint32_t write_dual_addr; /* Dual address/data write = 0 */
|
||||
uint32_t write_quad_data; /* Quad data write = 0 */
|
||||
uint32_t write_quad_addr; /* Quad address/data write = 32 */
|
||||
|
||||
/* Valid command masks */
|
||||
uint32_t dual_mode_commands; /* Valid commands in dual mode = 516 */
|
||||
uint32_t quad_mode_commands; /* Valid commands in quad mode = 784 */
|
||||
|
||||
/* Basic flash commands */
|
||||
uint8_t cmd_write_enable; /* Write enable = 0x06 */
|
||||
uint8_t cmd_read_id; /* Read identification = 0x9F */
|
||||
uint8_t cmd_read_status; /* Read status register = 0x05 */
|
||||
uint8_t cmd_read_status2; /* Read status register 2 = 0x35 */
|
||||
uint8_t cmd_write_status; /* Write status register = 0x01 */
|
||||
uint8_t cmd_write_status2; /* Write status register 2 = 0x00 */
|
||||
|
||||
/* Erase commands */
|
||||
uint8_t cmd_erase_chip; /* Chip erase = 0x60 */
|
||||
uint8_t cmd_erase_block; /* 64KB block erase = 0xD8 */
|
||||
uint8_t cmd_erase_sector; /* 4KB sector erase = 0x20 */
|
||||
|
||||
/* Power management */
|
||||
uint8_t cmd_release_powerdown; /* Exit power down = 0xAB */
|
||||
uint8_t cmd_enter_powerdown; /* Enter power down = 0xB9 */
|
||||
|
||||
/* Debug */
|
||||
uint8_t debug_enable; /* Enable debug output = 0 */
|
||||
uint8_t phase_shift_idx; /* Phase shift calibration index = 0 */
|
||||
} FLASH_InitTypeDef;
|
||||
|
||||
/* external ROM bloat */
|
||||
__always_long_call void Cache_Enable(uint32_t Enable);
|
||||
extern FLASH_InitTypeDef flash_init_para;
|
||||
extern __always_long_call uint32_t DiagPrintf(const char *fmt, ...);
|
||||
|
||||
__always_long_call void RCC_PeriphClockCmd(uint32_t APBPeriph,
|
||||
uint32_t APBPeriph_Clock,
|
||||
uint8_t NewState);
|
||||
|
||||
__always_long_call void PINMUX_Ctrl(uint32_t Function, uint32_t PinLocation,
|
||||
bool Operation);
|
||||
|
||||
__always_long_call void FLASH_Erase(uint32_t EraseType, uint32_t Address);
|
||||
__always_long_call void FLASH_SetStatusBits(uint32_t SetBits,
|
||||
uint32_t NewState);
|
||||
// __always_long_call void FLASH_WriteEn(void);
|
||||
__always_long_call void FLASH_RxCmd(uint8_t cmd, uint32_t read_len,
|
||||
uint8_t *read_data);
|
||||
__always_long_call void FLASH_TxData12B(uint32_t StartAddr,
|
||||
uint8_t DataPhaseLen, uint8_t *pData);
|
||||
__always_long_call void FLASH_StructInit_GD(void *FLASH_InitStruct);
|
||||
__always_long_call uint8_t FLASH_Init(uint8_t SpicBitMode);
|
||||
__always_long_call uint32_t FLASH_ClockDiv(uint8_t Div);
|
||||
|
||||
#endif // _RTL8710_FLASHER_H_
|
||||
@@ -5,190 +5,201 @@ set rtl8710_flasher_command_read 3
|
||||
set rtl8710_flasher_command_write 4
|
||||
set rtl8710_flasher_command_verify 5
|
||||
|
||||
set rtl8710_flasher_mac_address_offset 0xA088
|
||||
|
||||
set rtl8710_flasher_ready 0
|
||||
set rtl8710_flasher_capacity 0
|
||||
set rtl8710_flasher_auto_erase 0
|
||||
set rtl8710_flasher_auto_verify 0
|
||||
set rtl8710_flasher_auto_erase_sector 0xFFFFFFFF
|
||||
set rtl8710_flasher_auto_erase_sector 0
|
||||
|
||||
proc rtl8710_flasher_init {} {
|
||||
global rtl8710_flasher_firmware_ptr
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_ready
|
||||
global rtl8710_flasher_code
|
||||
global rtl8710_flasher_ready rtl8710_flasher_firmware_ptr
|
||||
global rtl8710_flasher_buffer rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_code
|
||||
|
||||
if {[expr {$rtl8710_flasher_ready == 0}]} {
|
||||
echo "initializing RTL8710 flasher"
|
||||
halt
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
array2mem rtl8710_flasher_code 32 $rtl8710_flasher_firmware_ptr [array size rtl8710_flasher_code]
|
||||
reg faultmask 0x01
|
||||
reg sp 0x20000000
|
||||
reg pc $rtl8710_flasher_firmware_ptr
|
||||
resume
|
||||
rtl8710_flasher_wait
|
||||
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set rtl8710_flasher_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}]
|
||||
set rtl8710_flasher_ready 1
|
||||
echo "RTL8710 flasher initialized"
|
||||
}
|
||||
return ""
|
||||
if {!$rtl8710_flasher_ready} {
|
||||
set buf_ctrl [expr {$rtl8710_flasher_buffer + 0x00}]
|
||||
set buf_status [expr {$rtl8710_flasher_buffer + 0x08}]
|
||||
set buf_id [expr {$rtl8710_flasher_buffer + 0x0C}]
|
||||
|
||||
halt
|
||||
# init buffer control regs
|
||||
mww $buf_status 0
|
||||
mww $buf_ctrl 1
|
||||
|
||||
# load and start flasher
|
||||
write_memory $rtl8710_flasher_firmware_ptr 32 $rtl8710_flasher_code
|
||||
reg faultmask 1
|
||||
reg sp 0x1003ef00
|
||||
reg pc $rtl8710_flasher_firmware_ptr
|
||||
resume
|
||||
rtl8710_flasher_wait
|
||||
|
||||
set id [rtl8710_flasher_mrw $buf_id]
|
||||
set rtl8710_flasher_capacity [expr {1 << (($id >> 16) & 0xFF)}]
|
||||
set rtl8710_flasher_ready 1
|
||||
}
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_mrw {reg} {
|
||||
set value ""
|
||||
mem2array value 32 $reg 1
|
||||
return $value(0)
|
||||
read_memory $reg 32 1
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_wait {} {
|
||||
global rtl8710_flasher_buffer
|
||||
while {[rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x00}]]} { }
|
||||
global rtl8710_flasher_buffer
|
||||
set addr [expr {$rtl8710_flasher_buffer + 0x00}]
|
||||
while {[rtl8710_flasher_mrw $addr]} {}
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_load_block {local_filename offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
load_image $local_filename [expr {$rtl8710_flasher_buffer + 0x20 - $offset}] bin [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||
proc rtl8710_flasher_load_block {local_filename offset length} {
|
||||
global rtl8710_flasher_buffer
|
||||
set buffer_addr [expr {$rtl8710_flasher_buffer + 0x20}]
|
||||
load_image $local_filename [expr {$buffer_addr - $offset}] bin $buffer_addr $length
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_block {command offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_read rtl8710_flasher_command_write rtl8710_flasher_command_verify
|
||||
|
||||
# select command type
|
||||
switch $command {
|
||||
"read" {set cmd_type $rtl8710_flasher_command_read}
|
||||
"write" {set cmd_type $rtl8710_flasher_command_write}
|
||||
"verify" {set cmd_type $rtl8710_flasher_command_verify}
|
||||
default {error "Unknown command type: $command"}
|
||||
}
|
||||
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $cmd_type
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
if {$command eq "verify"} {
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set status [expr {$status + $offset}]
|
||||
}
|
||||
error "$command error, offset $status"
|
||||
}
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_read_block {offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_read
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
error "read error, offset $offset"
|
||||
}
|
||||
rtl8710_flasher_block "read" $offset $len
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_write_block {offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_write
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_write
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
error "write error, offset $offset"
|
||||
}
|
||||
rtl8710_flasher_block "write" $offset $len
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_verify_block {offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_verify
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_verify
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set status [expr {$status + $offset}]
|
||||
error "verify error, offset $status"
|
||||
}
|
||||
rtl8710_flasher_block "verify" $offset $len
|
||||
}
|
||||
|
||||
proc rtl8710_flash_read_id {} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_command_read_id
|
||||
rtl8710_flasher_init
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read_id
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set manufacturer_id [format "0x%02X" [expr {$id & 0xFF}]]
|
||||
set memory_type [format "0x%02X" [expr {($id >> 8) & 0xFF}]]
|
||||
set memory_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}]
|
||||
echo "manufacturer ID: $manufacturer_id, memory type: $memory_type, memory capacity: $memory_capacity bytes"
|
||||
global rtl8710_flasher_buffer rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_command_read_id
|
||||
|
||||
rtl8710_flasher_init
|
||||
|
||||
# send read ID command
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read_id
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 1
|
||||
rtl8710_flasher_wait
|
||||
|
||||
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
|
||||
set manufacturer_id [format "0x%02X" [expr {$id & 0xFF}]]
|
||||
set memory_type [format "0x%02X" [expr {($id >> 8) & 0xFF}]]
|
||||
set memory_capacity [expr {2 ** (($id >> 16) & 0xFF)}]
|
||||
|
||||
echo "manufacturer ID: $manufacturer_id, memory type: $memory_type, memory capacity: $memory_capacity bytes"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_erase {type {offset 0}} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_mass_erase rtl8710_flasher_command_sector_erase
|
||||
|
||||
rtl8710_flasher_init
|
||||
|
||||
if {$type eq "mass"} {
|
||||
set cmd $rtl8710_flasher_command_mass_erase
|
||||
} elseif {$type eq "sector"} {
|
||||
set cmd $rtl8710_flasher_command_sector_erase
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
} else {
|
||||
error "Unknown erase type: $type"
|
||||
}
|
||||
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $cmd
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 1
|
||||
rtl8710_flasher_wait
|
||||
}
|
||||
|
||||
proc rtl8710_flash_mass_erase {} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_mass_erase
|
||||
rtl8710_flasher_init
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_mass_erase
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
rtl8710_flash_erase "mass"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_sector_erase {offset} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_sector_erase
|
||||
rtl8710_flasher_init
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_sector_erase
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
rtl8710_flash_erase "sector" $offset
|
||||
}
|
||||
|
||||
proc rtl8710_flash_read {local_filename loc size} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_buffer_size
|
||||
rtl8710_flasher_init
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {$size - $offset}]
|
||||
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||
set len $rtl8710_flasher_buffer_size
|
||||
}
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "read offset $flash_offset"
|
||||
rtl8710_flasher_read_block $flash_offset $len
|
||||
dump_image /tmp/_rtl8710_flasher.bin [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||
exec dd conv=notrunc if=/tmp/_rtl8710_flasher.bin "of=$local_filename" bs=1 "seek=$offset"
|
||||
global rtl8710_flasher_buffer rtl8710_flasher_buffer_size
|
||||
rtl8710_flasher_init
|
||||
|
||||
set tmp "/tmp/_rtl8710_flasher.bin"
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {($size - $offset) < $rtl8710_flasher_buffer_size ? ($size - $offset) : $rtl8710_flasher_buffer_size}]
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "read $flash_offset"
|
||||
rtl8710_flasher_read_block $flash_offset $len
|
||||
dump_image $tmp [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||
exec dd conv=notrunc if=$tmp of=$local_filename bs=1 seek=$offset
|
||||
echo "read $len bytes"
|
||||
}
|
||||
}
|
||||
file delete -force $tmp
|
||||
}
|
||||
|
||||
proc rtl8710_flash_write {local_filename loc} {
|
||||
global rtl8710_flasher_buffer_size
|
||||
global rtl8710_flasher_sector_size
|
||||
global rtl8710_flasher_auto_erase
|
||||
global rtl8710_flasher_auto_verify
|
||||
global rtl8710_flasher_auto_erase_sector
|
||||
rtl8710_flasher_init
|
||||
set sector 0
|
||||
set size [file size $local_filename]
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {$size - $offset}]
|
||||
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||
set len $rtl8710_flasher_buffer_size
|
||||
}
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "write offset $flash_offset"
|
||||
rtl8710_flasher_load_block $local_filename $offset $len
|
||||
if {[expr {$rtl8710_flasher_auto_erase != 0}]} {
|
||||
for {set i $flash_offset} {$i < [expr {$flash_offset + $len}]} {incr i} {
|
||||
set sector [expr {$i / $rtl8710_flasher_sector_size}]
|
||||
if {[expr {$rtl8710_flasher_auto_erase_sector != $sector}]} {
|
||||
echo "erase sector $sector"
|
||||
rtl8710_flash_sector_erase [expr {$sector * $rtl8710_flasher_sector_size}]
|
||||
set rtl8710_flasher_auto_erase_sector $sector
|
||||
}
|
||||
}
|
||||
}
|
||||
rtl8710_flasher_write_block $flash_offset $len
|
||||
echo "wrote $len bytes"
|
||||
if {[expr {$rtl8710_flasher_auto_verify != 0}]} {
|
||||
echo "verify offset $flash_offset"
|
||||
rtl8710_flasher_verify_block $flash_offset $len
|
||||
}
|
||||
}
|
||||
global rtl8710_flasher_buffer_size rtl8710_flasher_sector_size
|
||||
global rtl8710_flasher_auto_erase rtl8710_flasher_auto_verify
|
||||
global rtl8710_flasher_auto_erase_sector
|
||||
rtl8710_flasher_init
|
||||
set size [file size $local_filename]
|
||||
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {($size - $offset) < $rtl8710_flasher_buffer_size ? ($size - $offset) : $rtl8710_flasher_buffer_size}]
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "write offset $flash_offset"
|
||||
rtl8710_flasher_load_block $local_filename $offset $len
|
||||
|
||||
if {$rtl8710_flasher_auto_erase} {
|
||||
set start_sector [expr {$flash_offset / $rtl8710_flasher_sector_size}]
|
||||
set end_sector [expr {($flash_offset + $len - 1) / $rtl8710_flasher_sector_size}]
|
||||
# erase any new sectors we encounter
|
||||
for {set sector $start_sector} {$sector <= $end_sector} {incr sector} {
|
||||
set sector_addr [expr {$sector * $rtl8710_flasher_sector_size}]
|
||||
if {$sector_addr >= $rtl8710_flasher_auto_erase_sector} {
|
||||
rtl8710_flash_sector_erase $sector_addr
|
||||
set rtl8710_flasher_auto_erase_sector [expr {$sector_addr + $rtl8710_flasher_sector_size}]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
rtl8710_flasher_write_block $flash_offset $len
|
||||
echo "wrote $len bytes"
|
||||
|
||||
if {$rtl8710_flasher_auto_verify} {
|
||||
echo "verify offset $flash_offset"
|
||||
rtl8710_flasher_verify_block $flash_offset $len
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
proc rtl8710_flash_verify {local_filename loc} {
|
||||
@@ -208,26 +219,28 @@ proc rtl8710_flash_verify {local_filename loc} {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
proc rtl8710_flash_read_mac {} {
|
||||
global rtl8710_flasher_mac_address_offset rtl8710_flasher_buffer
|
||||
|
||||
rtl8710_flasher_init
|
||||
rtl8710_flasher_read_block $rtl8710_flasher_mac_address_offset 6
|
||||
|
||||
set mac [read_memory [expr {$rtl8710_flasher_buffer + 0x20}] 8 6]
|
||||
set mac_str [join [lmap byte $mac {format %02X $byte}] ":"]
|
||||
echo "MAC address: $mac_str"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_auto_erase {on} {
|
||||
global rtl8710_flasher_auto_erase
|
||||
if {[expr {$on != 0}]} {
|
||||
set rtl8710_flasher_auto_erase 1
|
||||
echo "auto erase on"
|
||||
} else {
|
||||
set rtl8710_flasher_auto_erase 0
|
||||
echo "auto erase off"
|
||||
}
|
||||
global rtl8710_flasher_auto_erase
|
||||
set rtl8710_flasher_auto_erase [expr {$on != 0}]
|
||||
echo "auto erase [expr {$on ? "on" : "off"}]"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_auto_verify {on} {
|
||||
global rtl8710_flasher_auto_verify
|
||||
if {[expr {$on != 0}]} {
|
||||
set rtl8710_flasher_auto_verify 1
|
||||
echo "auto verify on"
|
||||
} else {
|
||||
set rtl8710_flasher_auto_verify 0
|
||||
echo "auto verify off"
|
||||
}
|
||||
global rtl8710_flasher_auto_verify
|
||||
set rtl8710_flasher_auto_verify [expr {$on != 0}]
|
||||
echo "auto verify [expr {$on ? "on" : "off"}]"
|
||||
}
|
||||
|
||||
proc rtl8710_reboot {} {
|
||||
|
||||
@@ -1,9 +1,7 @@
|
||||
#
|
||||
# OpenOCD script for RTL8710
|
||||
# Copyright (C) 2016 Rebane, rebane@alkohol.ee
|
||||
#
|
||||
source [find interface/jlink.cfg]
|
||||
|
||||
source [find target/swj-dp.tcl]
|
||||
adapter driver jlink
|
||||
transport select swd
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
@@ -17,8 +15,6 @@ if { [info exists ENDIAN] } {
|
||||
set _ENDIAN little
|
||||
}
|
||||
|
||||
# Work-area is a space in RAM used for flash programming
|
||||
# By default use 2kB
|
||||
if { [info exists WORKAREASIZE] } {
|
||||
set _WORKAREASIZE $WORKAREASIZE
|
||||
} else {
|
||||
@@ -31,72 +27,26 @@ if { [info exists CPUTAPID] } {
|
||||
set _CPUTAPID 0x2ba01477
|
||||
}
|
||||
|
||||
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||
swd newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
|
||||
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
|
||||
|
||||
$_TARGETNAME configure -work-area-phys 0x10001000 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||||
# todo: get work area from makefile
|
||||
$_TARGETNAME configure -work-area-phys 0x10001500 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||||
|
||||
adapter_khz 500
|
||||
adapter_nsrst_delay 100
|
||||
adapter speed 3000
|
||||
adapter srst delay 100
|
||||
cortex_m reset_config vectreset
|
||||
|
||||
if {![using_hla]} {
|
||||
# if srst is not fitted use SYSRESETREQ to
|
||||
# perform a soft reset
|
||||
cortex_m reset_config sysresetreq
|
||||
}
|
||||
|
||||
set rtl8710_flasher_firmware_ptr 0x10001000
|
||||
$_TARGETNAME configure -event reset-init {amebaz_init}
|
||||
set rtl8710_flasher_firmware_ptr 0x10001500
|
||||
set rtl8710_flasher_buffer 0x10008000
|
||||
set rtl8710_flasher_buffer_size 262144
|
||||
set rtl8710_flasher_buffer_size 204800
|
||||
set rtl8710_flasher_sector_size 4096
|
||||
|
||||
array set rtl8710_flasher_code {
|
||||
0 0xB671B57F 1 0x25FF4B58 2 0x6B196B1A 3 0x7040F042 4 0x69D96318 5 0xF4414E55
|
||||
6 0x69D97480 7 0xF8D361DC 8 0xF8C32120 9 0xF8D35120 10 0xF8C31124 11 0x47B05124
|
||||
12 0x47B04E4F 13 0x47984B4F 14 0x60104A4F 15 0x484F47B0 16 0x60012100 17 0x2C006804
|
||||
18 0x4D4DD0FC 19 0xB93E682E 20 0x60264C49 21 0x47B04E46 22 0x47984B46 23 0xE7ED6020
|
||||
24 0x2B01682B 25 0x4E42D109 26 0x4C4647B0 27 0x47A02006 28 0x47904A45 29 0x47A020C7
|
||||
30 0x682AE00D 31 0xD10E2A02 32 0x47B04E3B 33 0x20064C3F 34 0x483F47A0 35 0x493F4780
|
||||
36 0x68084D3F 37 0x47B047A8 38 0x47A02004 39 0x6828E7CE 40 0xD1132803 41 0x47A04C32
|
||||
42 0x24004838 43 0x4E396805 44 0x68311960 45 0xD206428C 46 0x4B384A37 47 0x221018A1
|
||||
48 0x34104798 49 0x4D2AE7F3 50 0xE7B847A8 51 0x29046829 52 0x2400D11B 53 0x6806482F
|
||||
54 0xD2B042B4 55 0x47A84D24 56 0x20064E28 57 0x4B2847B0 58 0x49284798 59 0x680A4B2A
|
||||
60 0x18A018E1 61 0xF44F4B2A 62 0x47987280 63 0x200447A8 64 0xF50447B0 65 0x47A87480
|
||||
66 0x682CE7E4 67 0xD1232C05 68 0x47984B17 69 0x4D1F2400 70 0x4294682A 71 0x481BD28F
|
||||
72 0x68012210 73 0x18604E1D 74 0x47B04669 75 0x1B19682B 76 0xBF282910 77 0x23002110
|
||||
78 0xD011428B 79 0xF81D4A16 80 0x18A05003 81 0x42B55CC6 82 0x3301D101 83 0x4A15E7F4
|
||||
84 0x60112101 85 0xE7726054 86 0x25014E12 87 0xE76E6035 88 0x47A84D03 89 0xE7D63410
|
||||
90 0x40000200 91 0x100011BD 92 0x100013DD 93 0x10001289 94 0x1000800C 95 0x10008000
|
||||
96 0x10008004 97 0x1000130D 98 0x100013ED 99 0x10008010 100 0x10001335 101 0x10008014
|
||||
102 0x10008020 103 0x10001221 104 0x10001375 105 0x10008008 106 0x6A5A4B03 107 0xD0FB0512
|
||||
108 0x0060F893 109 0xBF004770 110 0x40006000 111 0x6B194B17 112 0xF4416B1A 113 0x63187040
|
||||
114 0x69186919 115 0x0110F041 116 0xF8D36119 117 0x220000C0 118 0x0106F020 119 0x00C0F8D3
|
||||
120 0x10C0F8C3 121 0x00C0F8D3 122 0x0101F040 123 0x00C0F8D3 124 0x10C0F8C3 125 0x43BCF503
|
||||
126 0x609A6899 127 0x20016AD9 128 0x691962DA 129 0x69596118 130 0x61592102 131 0x619A6999
|
||||
132 0x61DA69D9 133 0x64DA6CD9 134 0xBF004770 135 0x40000200 136 0x460EB570 137 0xB34A4614
|
||||
138 0xF3C04B15 139 0x681A4507 140 0x7240F44F 141 0x685A601A 142 0xF3C02103 143 0x2C102207
|
||||
144 0x2410BF28 145 0x605CB2C0 146 0x1060F883 147 0x5060F883 148 0xF8832101 149 0xF8832060
|
||||
150 0x689A0060 151 0x60992500 152 0x47984B08 153 0x35015570 154 0x42A2B2AA 155 0x4804D3F8
|
||||
156 0xF0116A81 157 0xD1FA0301 158 0x60836881 159 0xBD704620 160 0x40006000 161 0x100011A9
|
||||
162 0x4C10B5F8 163 0x68232003 164 0x7340F44F 165 0x68636023 166 0x60602101 167 0x68A3229F
|
||||
168 0x60A14D0B 169 0x2060F884 170 0x460647A8 171 0x460747A8 172 0x040347A8 173 0x2707EA43
|
||||
174 0x0006EA47 175 0x4B036AA1 176 0x0201F011 177 0x6899D1FA 178 0xBDF8609A 179 0x40006000
|
||||
180 0x100011A9 181 0x4C0BB510 182 0x68232001 183 0x7340F44F 184 0x68636023 185 0x60602105
|
||||
186 0x60A068A2 187 0xF8844A06 188 0x47901060 189 0x4B036AA1 190 0x0201F011 191 0x6899D1FA
|
||||
192 0xBD10609A 193 0x40006000 194 0x100011A9 195 0x21014B08 196 0xF44F681A 197 0x601A7280
|
||||
198 0x6099689A 199 0x0060F883 200 0x48036A9A 201 0x0101F012 202 0x6883D1FA 203 0x47706081
|
||||
204 0x40006000 205 0x21014B0E 206 0xF44F681A 207 0x601A7280 208 0x2220689A 209 0xF8836099
|
||||
210 0xF3C02060 211 0xF3C04107 212 0xB2C02207 213 0x1060F883 214 0x2060F883 215 0x0060F883
|
||||
216 0x4A036A99 217 0x0001F011 218 0x6893D1FA 219 0x47706090 220 0x40006000 221 0xB36AB530
|
||||
222 0x25014B17 223 0xF44F681C 224 0x601C7480 225 0x2402689C 226 0xF883609D 227 0xF3C04060
|
||||
228 0xF3C04507 229 0xB2C02407 230 0x5060F883 231 0x7F80F5B2 232 0xF44FBF28 233 0xF8837280
|
||||
234 0xF8834060 235 0x20000060 236 0x4C095C0D 237 0xF8843001 238 0xB2855060 239 0xD3F74295
|
||||
240 0x07496A99 241 0x6AA0D5FC 242 0xF0104B03 243 0xD1FA0101 244 0x60996898 245 0xBD304610
|
||||
246 0x40006000 247 0x4B02B508 248 0x07C04798 249 0xBD08D4FB 250 0x100012D5 251 0x4B04B508
|
||||
252 0xF0004798 253 0xB2C10002 254 0xD0F82900 255 0xBF00BD08 256 0x100012D5
|
||||
}
|
||||
set rtl8710_flasher_code [list 0x4880e92d 0x5d80f5ad 0xb673b085 0x0810f10d 0xf8482300 0xf04f3c04 0x4e6d4380 0x3210f8d3 0x0f10f013 0x486bd001 0x4c6b47b0 0x22004d6b 0x7180f44f 0x47a02010 0x20004b69 0x22014798 0x7180f44f 0x47a02010 0x21002201 0x4c664b65 0x4798200a 0x46284b65 0x4b654798 0x47982002 0x0049f895 0x2103aa03 0xf81847a0 0xf8183c02 0xf8182c03 0x485f1c04 0x682947b0 0x47b0485e 0x796a68ab 0x485d7929 0x7feb47b0 0x7f297f6a 0x485b9300 0x47b07fab 0x21004b5a 0x4798201c 0x47b04859 0x20004b59 0x46a14798 0x23004c58 0x68236023 0x6863b193 0xf2002b05 0xa2018086 0xf023f852 0x100015e1 0x100015f3 0x10001601 0x10001627 0x1000162b 0x10001659 0xe7e8bf00 0x0049f895 0x2104aa03 0xf85847c8 0x60e33c04 0x2100e7dd 0x4b474608 0x48474798 0xe7d647b0 0x4b446921 0x47982002 0x6922e7d1 0x6200f102 0xf10358d1 0xf5025280 0x33044200 0x69626211 0xd8f2429a 0x2300e7c3 0x6961e7f9 0x6922483b 0xf8df4f3b 0x47b0b0f0 0x0a00f04f 0x45536963 0x4839d801 0x6920e7da 0x0207eb0a 0x21044450 0xf10a47d8 0xe7f10a04 0x69236923 0x44136962 0x0b1b3b01 0x69622700 0xd9a042ba 0xf1026922 0x59d26200 0x2000f8c8 0x1bd26962 0xbf982a04 0x69226960 0xbf94443a 0x20041bc0 0x3f12ebb3 0x46c6d38d 0x0c00f04f 0xd1014584 0xe7e23704 0x010ceb07 0x0a01eb04 0x2b01f81e 0xb020f89a 0xd007455a 0x3020f89a 0x47b0481c 0x60a32301 0xe77460e7 0x0c01f10c 0x2301e7e6 0xe76e60a3 0x000004dd 0x10001730 0x00009b65 0x10000dec 0x00007d15 0x000042fd 0x00007465 0x00007b81 0x00007ca1 0x10001760 0x10001783 0x1000179b 0x100017ce 0x0000784d 0x10001806 0x00005811 0x10008000 0x00007755 0x10001828 0x1000184d 0x10008020 0x00007661 0x10001884 0x100018ac 0x414c465b 0x52454853 0x6c46205d 0x20687361 0x69726570 0x72656870 0x61206c61 0x6165726c 0x65207964 0x6c62616e 0x2e2e6465 0x000a3f2e 0x414c465b 0x205d4853 0x69766544 0x49206563 0x25203a44 0x20583230 0x58323025 0x32302520 0x5b000a58 0x53414c46 0x56205d48 0x6f646e65 0x30203a72 0x38302578 0x5b000a58 0x53414c46 0x43205d48 0x69666e6f 0x4d203a67 0x3d65646f 0x202c6425 0x636f6c43 0x64253d6b 0x6552202c 0x6d436461 0x78303d64 0x58323025 0x465b000a 0x4853414c 0x6954205d 0x676e696d 0x6153203a 0x656c706d 0x616c6544 0x64253d79 0x7544202c 0x43796d6d 0x656c6379 0x255b3d73 0x64252c64 0x5d64252c 0x465b000a 0x4853414c 0x6c42205d 0x206b636f 0x746f7270 0x69746365 0x63206e6f 0x7261656c 0x000a6465 0x414c465b 0x52454853 0x7546205d 0x63206c6c 0x20706968 0x73617265 0x6f632065 0x656c706d 0x0a646574 0x4c465b00 0x45485341 0x53205d52 0x74726174 0x20676e69 0x74697277 0x666f2065 0x20642520 0x65747962 0x74612073 0x66666f20 0x20746573 0x30257830 0x000a5838 0x414c465b 0x52454853 0x7257205d 0x20657469 0x706d6f63 0x6574656c 0x75732064 0x73656363 0x6c756673 0x000a796c 0x5245565b 0x5d594649 0x73696d20 0x6374616d 0x74612068 0x66666f20 0x20746573 0x203a7825 0x73616c66 0x30253d68 0x62207832 0x253d6675 0x0a783230 0x00000000 ]
|
||||
|
||||
set rtl8710_flasher_command_read_id 0
|
||||
set rtl8710_flasher_command_mass_erase 1
|
||||
@@ -105,190 +55,201 @@ set rtl8710_flasher_command_read 3
|
||||
set rtl8710_flasher_command_write 4
|
||||
set rtl8710_flasher_command_verify 5
|
||||
|
||||
set rtl8710_flasher_mac_address_offset 0xA088
|
||||
|
||||
set rtl8710_flasher_ready 0
|
||||
set rtl8710_flasher_capacity 0
|
||||
set rtl8710_flasher_auto_erase 0
|
||||
set rtl8710_flasher_auto_verify 0
|
||||
set rtl8710_flasher_auto_erase_sector 0xFFFFFFFF
|
||||
set rtl8710_flasher_auto_erase_sector 0
|
||||
|
||||
proc rtl8710_flasher_init {} {
|
||||
global rtl8710_flasher_firmware_ptr
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_ready
|
||||
global rtl8710_flasher_code
|
||||
global rtl8710_flasher_ready rtl8710_flasher_firmware_ptr
|
||||
global rtl8710_flasher_buffer rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_code
|
||||
|
||||
if {[expr {$rtl8710_flasher_ready == 0}]} {
|
||||
echo "initializing RTL8710 flasher"
|
||||
halt
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
array2mem rtl8710_flasher_code 32 $rtl8710_flasher_firmware_ptr [array size rtl8710_flasher_code]
|
||||
reg faultmask 0x01
|
||||
reg sp 0x20000000
|
||||
reg pc $rtl8710_flasher_firmware_ptr
|
||||
resume
|
||||
rtl8710_flasher_wait
|
||||
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set rtl8710_flasher_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}]
|
||||
set rtl8710_flasher_ready 1
|
||||
echo "RTL8710 flasher initialized"
|
||||
}
|
||||
return ""
|
||||
if {!$rtl8710_flasher_ready} {
|
||||
set buf_ctrl [expr {$rtl8710_flasher_buffer + 0x00}]
|
||||
set buf_status [expr {$rtl8710_flasher_buffer + 0x08}]
|
||||
set buf_id [expr {$rtl8710_flasher_buffer + 0x0C}]
|
||||
|
||||
halt
|
||||
# init buffer control regs
|
||||
mww $buf_status 0
|
||||
mww $buf_ctrl 1
|
||||
|
||||
# load and start flasher
|
||||
write_memory $rtl8710_flasher_firmware_ptr 32 $rtl8710_flasher_code
|
||||
reg faultmask 1
|
||||
reg sp 0x1003ef00
|
||||
reg pc $rtl8710_flasher_firmware_ptr
|
||||
resume
|
||||
rtl8710_flasher_wait
|
||||
|
||||
set id [rtl8710_flasher_mrw $buf_id]
|
||||
set rtl8710_flasher_capacity [expr {1 << (($id >> 16) & 0xFF)}]
|
||||
set rtl8710_flasher_ready 1
|
||||
}
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_mrw {reg} {
|
||||
set value ""
|
||||
mem2array value 32 $reg 1
|
||||
return $value(0)
|
||||
read_memory $reg 32 1
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_wait {} {
|
||||
global rtl8710_flasher_buffer
|
||||
while {[rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x00}]]} { }
|
||||
global rtl8710_flasher_buffer
|
||||
set addr [expr {$rtl8710_flasher_buffer + 0x00}]
|
||||
while {[rtl8710_flasher_mrw $addr]} {}
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_load_block {local_filename offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
load_image $local_filename [expr {$rtl8710_flasher_buffer + 0x20 - $offset}] bin [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||
proc rtl8710_flasher_load_block {local_filename offset length} {
|
||||
global rtl8710_flasher_buffer
|
||||
set buffer_addr [expr {$rtl8710_flasher_buffer + 0x20}]
|
||||
load_image $local_filename [expr {$buffer_addr - $offset}] bin $buffer_addr $length
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_block {command offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_read rtl8710_flasher_command_write rtl8710_flasher_command_verify
|
||||
|
||||
# select command type
|
||||
switch $command {
|
||||
"read" {set cmd_type $rtl8710_flasher_command_read}
|
||||
"write" {set cmd_type $rtl8710_flasher_command_write}
|
||||
"verify" {set cmd_type $rtl8710_flasher_command_verify}
|
||||
default {error "Unknown command type: $command"}
|
||||
}
|
||||
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $cmd_type
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
if {$command eq "verify"} {
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set status [expr {$status + $offset}]
|
||||
}
|
||||
error "$command error, offset $status"
|
||||
}
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_read_block {offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_read
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
error "read error, offset $offset"
|
||||
}
|
||||
rtl8710_flasher_block "read" $offset $len
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_write_block {offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_write
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_write
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
error "write error, offset $offset"
|
||||
}
|
||||
rtl8710_flasher_block "write" $offset $len
|
||||
}
|
||||
|
||||
proc rtl8710_flasher_verify_block {offset len} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_verify
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_verify
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||
if {[expr {$status > 0}]} {
|
||||
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set status [expr {$status + $offset}]
|
||||
error "verify error, offset $status"
|
||||
}
|
||||
rtl8710_flasher_block "verify" $offset $len
|
||||
}
|
||||
|
||||
proc rtl8710_flash_read_id {} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_command_read_id
|
||||
rtl8710_flasher_init
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read_id
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
set manufacturer_id [format "0x%02X" [expr {$id & 0xFF}]]
|
||||
set memory_type [format "0x%02X" [expr {($id >> 8) & 0xFF}]]
|
||||
set memory_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}]
|
||||
echo "manufacturer ID: $manufacturer_id, memory type: $memory_type, memory capacity: $memory_capacity bytes"
|
||||
global rtl8710_flasher_buffer rtl8710_flasher_capacity
|
||||
global rtl8710_flasher_command_read_id
|
||||
|
||||
rtl8710_flasher_init
|
||||
|
||||
# send read ID command
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read_id
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 1
|
||||
rtl8710_flasher_wait
|
||||
|
||||
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||
|
||||
set manufacturer_id [format "0x%02X" [expr {$id & 0xFF}]]
|
||||
set memory_type [format "0x%02X" [expr {($id >> 8) & 0xFF}]]
|
||||
set memory_capacity [expr {2 ** (($id >> 16) & 0xFF)}]
|
||||
|
||||
echo "manufacturer ID: $manufacturer_id, memory type: $memory_type, memory capacity: $memory_capacity bytes"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_erase {type {offset 0}} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_mass_erase rtl8710_flasher_command_sector_erase
|
||||
|
||||
rtl8710_flasher_init
|
||||
|
||||
if {$type eq "mass"} {
|
||||
set cmd $rtl8710_flasher_command_mass_erase
|
||||
} elseif {$type eq "sector"} {
|
||||
set cmd $rtl8710_flasher_command_sector_erase
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
} else {
|
||||
error "Unknown erase type: $type"
|
||||
}
|
||||
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $cmd
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 1
|
||||
rtl8710_flasher_wait
|
||||
}
|
||||
|
||||
proc rtl8710_flash_mass_erase {} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_mass_erase
|
||||
rtl8710_flasher_init
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_mass_erase
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
rtl8710_flash_erase "mass"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_sector_erase {offset} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_command_sector_erase
|
||||
rtl8710_flasher_init
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_sector_erase
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||
rtl8710_flasher_wait
|
||||
rtl8710_flash_erase "sector" $offset
|
||||
}
|
||||
|
||||
proc rtl8710_flash_read {local_filename loc size} {
|
||||
global rtl8710_flasher_buffer
|
||||
global rtl8710_flasher_buffer_size
|
||||
rtl8710_flasher_init
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {$size - $offset}]
|
||||
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||
set len $rtl8710_flasher_buffer_size
|
||||
}
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "read offset $flash_offset"
|
||||
rtl8710_flasher_read_block $flash_offset $len
|
||||
dump_image /tmp/_rtl8710_flasher.bin [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||
exec dd conv=notrunc if=/tmp/_rtl8710_flasher.bin "of=$local_filename" bs=1 "seek=$offset"
|
||||
global rtl8710_flasher_buffer rtl8710_flasher_buffer_size
|
||||
rtl8710_flasher_init
|
||||
|
||||
set tmp "/tmp/_rtl8710_flasher.bin"
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {($size - $offset) < $rtl8710_flasher_buffer_size ? ($size - $offset) : $rtl8710_flasher_buffer_size}]
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "read $flash_offset"
|
||||
rtl8710_flasher_read_block $flash_offset $len
|
||||
dump_image $tmp [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||
exec dd conv=notrunc if=$tmp of=$local_filename bs=1 seek=$offset
|
||||
echo "read $len bytes"
|
||||
}
|
||||
}
|
||||
file delete -force $tmp
|
||||
}
|
||||
|
||||
proc rtl8710_flash_write {local_filename loc} {
|
||||
global rtl8710_flasher_buffer_size
|
||||
global rtl8710_flasher_sector_size
|
||||
global rtl8710_flasher_auto_erase
|
||||
global rtl8710_flasher_auto_verify
|
||||
global rtl8710_flasher_auto_erase_sector
|
||||
rtl8710_flasher_init
|
||||
set sector 0
|
||||
set size [file size $local_filename]
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {$size - $offset}]
|
||||
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||
set len $rtl8710_flasher_buffer_size
|
||||
}
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "write offset $flash_offset"
|
||||
rtl8710_flasher_load_block $local_filename $offset $len
|
||||
if {[expr {$rtl8710_flasher_auto_erase != 0}]} {
|
||||
for {set i $flash_offset} {$i < [expr {$flash_offset + $len}]} {incr i} {
|
||||
set sector [expr {$i / $rtl8710_flasher_sector_size}]
|
||||
if {[expr {$rtl8710_flasher_auto_erase_sector != $sector}]} {
|
||||
echo "erase sector $sector"
|
||||
rtl8710_flash_sector_erase [expr {$sector * $rtl8710_flasher_sector_size}]
|
||||
set rtl8710_flasher_auto_erase_sector $sector
|
||||
}
|
||||
}
|
||||
}
|
||||
rtl8710_flasher_write_block $flash_offset $len
|
||||
echo "wrote $len bytes"
|
||||
if {[expr {$rtl8710_flasher_auto_verify != 0}]} {
|
||||
echo "verify offset $flash_offset"
|
||||
rtl8710_flasher_verify_block $flash_offset $len
|
||||
}
|
||||
}
|
||||
global rtl8710_flasher_buffer_size rtl8710_flasher_sector_size
|
||||
global rtl8710_flasher_auto_erase rtl8710_flasher_auto_verify
|
||||
global rtl8710_flasher_auto_erase_sector
|
||||
rtl8710_flasher_init
|
||||
set size [file size $local_filename]
|
||||
|
||||
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||
set len [expr {($size - $offset) < $rtl8710_flasher_buffer_size ? ($size - $offset) : $rtl8710_flasher_buffer_size}]
|
||||
set flash_offset [expr {$loc + $offset}]
|
||||
echo "write offset $flash_offset"
|
||||
rtl8710_flasher_load_block $local_filename $offset $len
|
||||
|
||||
if {$rtl8710_flasher_auto_erase} {
|
||||
set start_sector [expr {$flash_offset / $rtl8710_flasher_sector_size}]
|
||||
set end_sector [expr {($flash_offset + $len - 1) / $rtl8710_flasher_sector_size}]
|
||||
# erase any new sectors we encounter
|
||||
for {set sector $start_sector} {$sector <= $end_sector} {incr sector} {
|
||||
set sector_addr [expr {$sector * $rtl8710_flasher_sector_size}]
|
||||
if {$sector_addr >= $rtl8710_flasher_auto_erase_sector} {
|
||||
rtl8710_flash_sector_erase $sector_addr
|
||||
set rtl8710_flasher_auto_erase_sector [expr {$sector_addr + $rtl8710_flasher_sector_size}]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
rtl8710_flasher_write_block $flash_offset $len
|
||||
echo "wrote $len bytes"
|
||||
|
||||
if {$rtl8710_flasher_auto_verify} {
|
||||
echo "verify offset $flash_offset"
|
||||
rtl8710_flasher_verify_block $flash_offset $len
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
proc rtl8710_flash_verify {local_filename loc} {
|
||||
@@ -308,26 +269,28 @@ proc rtl8710_flash_verify {local_filename loc} {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
proc rtl8710_flash_read_mac {} {
|
||||
global rtl8710_flasher_mac_address_offset rtl8710_flasher_buffer
|
||||
|
||||
rtl8710_flasher_init
|
||||
rtl8710_flasher_read_block $rtl8710_flasher_mac_address_offset 6
|
||||
|
||||
set mac [read_memory [expr {$rtl8710_flasher_buffer + 0x20}] 8 6]
|
||||
set mac_str [join [lmap byte $mac {format %02X $byte}] ":"]
|
||||
echo "MAC address: $mac_str"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_auto_erase {on} {
|
||||
global rtl8710_flasher_auto_erase
|
||||
if {[expr {$on != 0}]} {
|
||||
set rtl8710_flasher_auto_erase 1
|
||||
echo "auto erase on"
|
||||
} else {
|
||||
set rtl8710_flasher_auto_erase 0
|
||||
echo "auto erase off"
|
||||
}
|
||||
global rtl8710_flasher_auto_erase
|
||||
set rtl8710_flasher_auto_erase [expr {$on != 0}]
|
||||
echo "auto erase [expr {$on ? "on" : "off"}]"
|
||||
}
|
||||
|
||||
proc rtl8710_flash_auto_verify {on} {
|
||||
global rtl8710_flasher_auto_verify
|
||||
if {[expr {$on != 0}]} {
|
||||
set rtl8710_flasher_auto_verify 1
|
||||
echo "auto verify on"
|
||||
} else {
|
||||
set rtl8710_flasher_auto_verify 0
|
||||
echo "auto verify off"
|
||||
}
|
||||
global rtl8710_flasher_auto_verify
|
||||
set rtl8710_flasher_auto_verify [expr {$on != 0}]
|
||||
echo "auto verify [expr {$on ? "on" : "off"}]"
|
||||
}
|
||||
|
||||
proc rtl8710_reboot {} {
|
||||
|
||||
146
spi_flash.c
146
spi_flash.c
@@ -1,146 +0,0 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (C) 2016 Rebane, rebane@alkohol.ee
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it under
|
||||
* the terms of the GNU General Public License as published by the Free Software
|
||||
* Foundation; either version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
|
||||
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "spi_flash.h"
|
||||
#include "rtl8710.h"
|
||||
#include "mask.h"
|
||||
|
||||
static void spi_flash_send(uint8_t byte){
|
||||
// while(!(SPI_FLASH->SR & SPI_SR_TFNF));
|
||||
SPI_FLASH->DR = byte;
|
||||
}
|
||||
|
||||
static uint8_t spi_flash_recv(){
|
||||
while(!(SPI_FLASH->RXFLR & 0x0FFF));
|
||||
return(SPI_FLASH->DR);
|
||||
}
|
||||
|
||||
void spi_flash_init(){
|
||||
PERI_ON->PESOC_CLK_CTRL |= PERI_ON_CLK_CTRL_ACTCK_FLASH_EN | PERI_ON_CLK_CTRL_SLPCK_FLASH_EN; // enable spi flash peripheral clock
|
||||
PERI_ON->SOC_FUNC_EN |= PERI_ON_SOC_FUNC_EN_FLASH; // enable spi flash peripheral
|
||||
mask32_set(PERI_ON->CPU_PERIPHERAL_CTRL, PERI_ON_CPU_PERIPHERAL_CTRL_SPI_FLASH_PIN_SEL, 0); // select spi flash pinout (0 - internal)
|
||||
PERI_ON->CPU_PERIPHERAL_CTRL |= PERI_ON_CPU_PERIPHERAL_CTRL_SPI_FLASH_PIN_EN; // enable spi flash pins
|
||||
|
||||
SPI_FLASH->SSIENR = 0; // disable SPI FLASH operation
|
||||
SPI_FLASH->IMR = 0; // disable all interrupts
|
||||
SPI_FLASH->SER = SPI_SER_SS0; // use first "slave select" pin
|
||||
SPI_FLASH->BAUDR = 2; // baud rate, default value
|
||||
SPI_FLASH->TXFTLR = 0; // tx fifo threshold
|
||||
SPI_FLASH->RXFTLR = 0; // rx fifo threshold
|
||||
SPI_FLASH->DMACR = 0; // disable DMA
|
||||
}
|
||||
|
||||
uint16_t spi_flash_read(uint32_t address, void *buf, uint16_t count){
|
||||
uint16_t i;
|
||||
if(!count)return(0);
|
||||
if(count > 16)count = 16;
|
||||
SPI_FLASH->CTRLR0 = mask32(SPI_CTRLR0_TMOD, 3) | mask32(SPI_CTRLR0_CMD_CH, 0) | mask32(SPI_CTRLR0_ADDR_CH, 0) | mask32(SPI_CTRLR0_DATA_CH, 0);
|
||||
SPI_FLASH->CTRLR1 = count;
|
||||
|
||||
spi_flash_send(0x03); // flash command "read"
|
||||
spi_flash_send((address >> 16) & 0xFF); // address * 3
|
||||
spi_flash_send((address >> 8) & 0xFF);
|
||||
spi_flash_send((address >> 0) & 0xFF);
|
||||
|
||||
SPI_FLASH->SSIENR = 1;
|
||||
|
||||
for(i = 0; i < count; i++){
|
||||
((uint8_t *)buf)[i] = spi_flash_recv();
|
||||
}
|
||||
while(SPI_FLASH->SR & SPI_SR_SSI);
|
||||
SPI_FLASH->SSIENR = 0;
|
||||
return(count);
|
||||
}
|
||||
|
||||
uint32_t spi_flash_jedec_id(){
|
||||
uint32_t id;
|
||||
SPI_FLASH->CTRLR0 = mask32(SPI_CTRLR0_TMOD, 3) | mask32(SPI_CTRLR0_CMD_CH, 0) | mask32(SPI_CTRLR0_ADDR_CH, 0) | mask32(SPI_CTRLR0_DATA_CH, 0);
|
||||
SPI_FLASH->CTRLR1 = 3;
|
||||
|
||||
SPI_FLASH->SSIENR = 1;
|
||||
spi_flash_send(0x9F); // jedec id
|
||||
id = spi_flash_recv();
|
||||
id |= ((uint32_t)spi_flash_recv() << 8);
|
||||
id |= ((uint32_t)spi_flash_recv() << 16);
|
||||
while(SPI_FLASH->SR & SPI_SR_SSI);
|
||||
SPI_FLASH->SSIENR = 0;
|
||||
return(id);
|
||||
}
|
||||
|
||||
uint8_t spi_flash_status(){
|
||||
uint8_t status;
|
||||
SPI_FLASH->CTRLR0 = mask32(SPI_CTRLR0_TMOD, 3) | mask32(SPI_CTRLR0_CMD_CH, 0) | mask32(SPI_CTRLR0_ADDR_CH, 0) | mask32(SPI_CTRLR0_DATA_CH, 0);
|
||||
SPI_FLASH->CTRLR1 = 1;
|
||||
|
||||
SPI_FLASH->SSIENR = 1;
|
||||
spi_flash_send(0x05); // read status
|
||||
status = spi_flash_recv();
|
||||
while(SPI_FLASH->SR & SPI_SR_SSI);
|
||||
SPI_FLASH->SSIENR = 0;
|
||||
return(status);
|
||||
}
|
||||
|
||||
void spi_flash_cmd(uint8_t cmd){
|
||||
SPI_FLASH->CTRLR0 = mask32(SPI_CTRLR0_TMOD, 1) | mask32(SPI_CTRLR0_CMD_CH, 0) | mask32(SPI_CTRLR0_ADDR_CH, 0) | mask32(SPI_CTRLR0_DATA_CH, 0);
|
||||
|
||||
SPI_FLASH->SSIENR = 1;
|
||||
spi_flash_send(cmd);
|
||||
while(SPI_FLASH->SR & SPI_SR_SSI);
|
||||
SPI_FLASH->SSIENR = 0;
|
||||
}
|
||||
|
||||
void spi_flash_sector_erase(uint32_t address){
|
||||
SPI_FLASH->CTRLR0 = mask32(SPI_CTRLR0_TMOD, 1) | mask32(SPI_CTRLR0_CMD_CH, 0) | mask32(SPI_CTRLR0_ADDR_CH, 0) | mask32(SPI_CTRLR0_DATA_CH, 0);
|
||||
|
||||
SPI_FLASH->SSIENR = 1;
|
||||
spi_flash_send(0x20); // sector erase
|
||||
spi_flash_send((address >> 16) & 0xFF);
|
||||
spi_flash_send((address >> 8) & 0xFF);
|
||||
spi_flash_send((address >> 0) & 0xFF);
|
||||
while(SPI_FLASH->SR & SPI_SR_SSI);
|
||||
SPI_FLASH->SSIENR = 0;
|
||||
}
|
||||
|
||||
uint16_t spi_flash_write(uint32_t address, const void *buf, uint16_t count){
|
||||
uint16_t i;
|
||||
if(!count)return(0);
|
||||
if(count > 256)count = 256;
|
||||
SPI_FLASH->CTRLR0 = mask32(SPI_CTRLR0_TMOD, 1) | mask32(SPI_CTRLR0_CMD_CH, 0) | mask32(SPI_CTRLR0_ADDR_CH, 0) | mask32(SPI_CTRLR0_DATA_CH, 0);
|
||||
|
||||
SPI_FLASH->SSIENR = 1;
|
||||
spi_flash_send(0x02); // write
|
||||
spi_flash_send((address >> 16) & 0xFF);
|
||||
spi_flash_send((address >> 8) & 0xFF);
|
||||
spi_flash_send((address >> 0) & 0xFF);
|
||||
for(i = 0; i < count; i++){
|
||||
spi_flash_send(((uint8_t *)buf)[i]);
|
||||
}
|
||||
while(!(SPI_FLASH->SR & SPI_SR_TFE));
|
||||
while(SPI_FLASH->SR & SPI_SR_SSI);
|
||||
SPI_FLASH->SSIENR = 0;
|
||||
return(count);
|
||||
}
|
||||
|
||||
void spi_flash_wait_busy(){
|
||||
while(spi_flash_status() & 0x01);
|
||||
}
|
||||
|
||||
void spi_flash_wait_wel(){
|
||||
while(!(spi_flash_status() & 0x02));
|
||||
}
|
||||
|
||||
35
spi_flash.h
35
spi_flash.h
@@ -1,35 +0,0 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (C) 2016 Rebane, rebane@alkohol.ee
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it under
|
||||
* the terms of the GNU General Public License as published by the Free Software
|
||||
* Foundation; either version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
|
||||
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SPI_FLASH_H_
|
||||
#define _SPI_FLASH_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void spi_flash_init();
|
||||
uint16_t spi_flash_read(uint32_t address, void *buf, uint16_t count);
|
||||
uint16_t spi_flash_write(uint32_t address, const void *buf, uint16_t count);
|
||||
uint32_t spi_flash_jedec_id();
|
||||
uint8_t spi_flash_status();
|
||||
void spi_flash_cmd(uint8_t cmd);
|
||||
void spi_flash_sector_erase(uint32_t address);
|
||||
void spi_flash_wait_busy();
|
||||
void spi_flash_wait_wel();
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user