chore: ld

.gitignore

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+build/
+.vscode/

.gitmodules

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+[submodule "rtl8710_openocd"]
+	path = rtl8710_openocd
+	url = git@git.hye.su:mira/rtl8710_openocd.git

Makefile

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+# Toolchain
+PREFIX = arm-none-eabi-
+CC = $(PREFIX)gcc
+AS = $(PREFIX)as
+LD = $(PREFIX)ld
+OBJCOPY = $(PREFIX)objcopy
+SIZE = $(PREFIX)size
+
+# Project configuration
+PROJECT = firmware
+MCU = cortex-m4
+FLASH_START = 0x00000000
+LOAD_ADDRESS = 0x10002000
+LD_FILE=linker.ld
+
+RAM_START := 0x10002000
+
+# Compiler flags
+CFLAGS = -mcpu=$(MCU) -mthumb \
+    -Wall -Wextra -g3 \
+    -Os -ffunction-sections -fdata-sections \
+    -nostartfiles -Wl,-T,$(LD_FILE) -u main -Wl,--gc-sections \
+    -DLOAD_ADDRESS=$(LOAD_ADDRESS)
+
+ASFLAGS = \
+    -mcpu=$(MCU) -mthumb \
+    -g
+
+LDFLAGS = \
+    -T linker.ld -Map=$(BUILD_DIR)/$(PROJECT).map \
+    --gc-sections --no-warn-rwx-segments \
+    --defsym=_RAM_START_ADDR=$(RAM_START)
+
+# Directories
+SRC_DIR = src
+BUILD_DIR = build
+INCLUDE_DIR = include
+
+# Source files
+SRCS = $(wildcard $(SRC_DIR)/*.c)
+ASM_SRCS = $(wildcard $(SRC_DIR)/*.s)
+OBJS = $(SRCS:$(SRC_DIR)/%.c=$(BUILD_DIR)/%.o)
+ASM_OBJS = $(ASM_SRCS:$(SRC_DIR)/%.s=$(BUILD_DIR)/%.o)
+
+# Include paths
+INCLUDES = -I$(INCLUDE_DIR)
+
+# Output files
+ELF = $(BUILD_DIR)/$(PROJECT).elf
+BIN = $(BUILD_DIR)/$(PROJECT).bin
+HEX = $(BUILD_DIR)/$(PROJECT).hex
+
+# flashing
+INTERFACE = stlink
+OPENOCD_BASE=openocd -f interface/$(INTERFACE).cfg -f rtl8710_openocd/script/rtl8710.ocd -c "init" -c "reset" -c "halt"
+FLASH_BIN = $(BUILD_DIR)/$(PROJECT).bin
+
+.PHONY: all clean flash size
+
+# Default target
+all: $(BUILD_DIR) $(ELF) $(BIN) $(HEX) size
+
+# Create build directory
+$(BUILD_DIR):
+	mkdir -p $(BUILD_DIR)
+
+# Compile C files
+$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c
+	@echo "CC $<"
+	@$(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
+
+# Compile assembly files
+$(BUILD_DIR)/%.o: $(SRC_DIR)/%.s
+	@echo "AS $<"
+	@$(AS) $(ASFLAGS) -c $< -o $@
+
+# Link
+$(ELF): $(OBJS) $(ASM_OBJS)
+	@echo "LD $@"
+	@$(LD) $(LDFLAGS) -o $@ $^
+
+# Generate binary
+$(BIN): $(ELF)
+	@echo "OBJCOPY $@"
+	@$(OBJCOPY) -O binary $< $@
+
+# Generate Intel HEX file
+$(HEX): $(ELF)
+	@echo "OBJCOPY $@"
+	@$(OBJCOPY) -O ihex $< $@
+
+# Print size information
+size: $(ELF)
+	@echo
+	@$(SIZE) $<
+
+# flash commands
+test:
+	$(OPENOCD_BASE) -c "rtl8710_flash_read_id" -c "shutdown"
+
+mac:
+	$(OPENOCD_BASE) -c "rtl8710_flash_read_mac" -c "shutdown"
+
+dump:
+	$(OPENOCD_BASE) -c "rtl8710_flash_read_id" -c "rtl8710_flash_read dump.bin 0 1048576" -c "shutdown"
+
+dump0:
+	$(OPENOCD_BASE) -c "rtl8710_flash_read_id" -c "rtl8710_flash_read dump0.bin 0 4096" -c "shutdown"
+
+flash:
+	@$(OPENOCD_BASE) -c 'rtl8710_flash_auto_erase 1' \
+	-c 'rtl8710_flash_auto_verify 1' \
+	-c 'rtl8710_flash_write $(FLASH_BIN) 0' \
+	-c 'rtl8710_reboot' -c 'reset run' -c shutdown
+
+full_erase:
+	$(OPENOCD_BASE) -c "rtl8710_flash_mass_erase" -c shutdown
+
+restore:
+	$(OPENOCD_BASE) -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write dump.bin 0" -c shutdown
+
+restore_nae:
+	$(OPENOCD_BASE) -c "rtl8710_flash_auto_erase 0" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write dump.bin 0" -c shutdown
+
+verify:
+	$(OPENOCD_BASE) -c "rtl8710_flash_verify dump.bin 0" -c shutdown
+
+reset:
+	$(OPENOCD_BASE) -c "rtl8710_reboot" -c shutdown
+
+# Clean build files
+clean:
+	rm -rf $(BUILD_DIR)
+

docs/README.md

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+# rtl8710bx
+
+### 1. [ROM boot sequence](./rom-boot-seq.md)

linker.ld

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+/* from https://github.com/ambiot/amb1_sdk/blob/master/project/realtek_amebaz_va0_example/GCC-RELEASE/export-rom_symbol_v01.txt */
+INCLUDE "./rtl8710_openocd/export-rom_symbol_v01.txt"
+
+MEMORY
+{
+    RAM (rwx) : ORIGIN = (_RAM_START_ADDR - 64), LENGTH = (256K + 64)  /* + header */
+}
+
+SECTIONS
+{
+    _stack_top = ORIGIN(RAM) + LENGTH(RAM) - (4 * 1024) - 4;
+
+    .rom_header : {
+        LONG(0x96969999) LONG(0xFC66CC3F)
+        LONG(0) 
+        . += 28;
+        LONG(_image_size)
+        LONG(_RAM_START_ADDR)
+        . += 16;
+    }
+    _rom_header_size = SIZEOF(.rom_header);
+
+    .text : {
+        . = ALIGN(4);
+        . += 20; 
+        LONG(_init + 1)
+        LONG(0x88167923) /* ROM checks this @ 0x10002018 */
+        . = ALIGN(8);
+        *(.vectors)
+        *(.text* .rodata* .data*)
+    }
+
+    .bss : {
+        . = ALIGN(4);
+        *(.bss* COMMON)
+    } > RAM
+
+    _image_size = SIZEOF(.text);
+}

src/boot.s

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+.syntax unified
+.cpu cortex-m4
+
+.section .text
+.global _init
+_init:
+    ldr r0, =0x1003E000
+    mov sp, r0
+
+    ldr r0, =_vector_table
+    ldr r1, =0xE000ED08
+    str r0, [r1]
+
+    push.w {r2-r9,r11,lr}
+    bl main
+    pop.w {r2-r9,r11,lr}
+1:  b 1b
+
+.section .vectors
+_vector_table:
+    .word _stack_top
+    .word _init
+    .word NMI_Handler
+    .word HardFault_Handler
+    .word MemManage_Handler
+    .word BusFault_Handler
+    .word UsageFault_Handler
+    .word 0                    /* Reserved */
+    .word 0                    /* Reserved */
+    .word 0                    /* Reserved */
+    .word 0                    /* Reserved */
+    .word SVC_Handler
+    .word DebugMon_Handler
+    .word 0                    /* Reserved */
+    .word PendSV_Handler
+    .word SysTick_Handler
+
+/* default */
+.weak NMI_Handler
+.weak HardFault_Handler
+.weak MemManage_Handler
+.weak BusFault_Handler
+.weak UsageFault_Handler
+.weak SVC_Handler
+.weak DebugMon_Handler
+.weak PendSV_Handler
+.weak SysTick_Handler
+
+.thumb_set NMI_Handler, Default_Handler
+.thumb_set HardFault_Handler, Default_Handler
+.thumb_set MemManage_Handler, Default_Handler
+.thumb_set BusFault_Handler, Default_Handler
+.thumb_set UsageFault_Handler, Default_Handler
+.thumb_set SVC_Handler, Default_Handler
+.thumb_set DebugMon_Handler, Default_Handler
+.thumb_set PendSV_Handler, Default_Handler
+.thumb_set SysTick_Handler, Default_Handler
+
+Default_Handler:
+    b Default_Handler

src/main.c

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+#include <stdint.h>
+
+extern uint32_t DiagPrintf(const char *fmt, ...)
+    __attribute__((format(printf, 1, 2)));
+#define printf DiagPrintf
+
+// GPIO direction register @ 0x1004 (from GPIO_Direction: 12 * port + 0x40000000
+// + 0x1000 + 4) For interrupt control: 0x1030: Interrupt enable register
+// 0x1038: Interrupt trigger type
+// 0x103C: Interrupt polarity
+// 0x1048: Interrupt debounce
+
+#define PERIPH_BASE 0x40000000
+// 12 * port_number(0) + PERIPH_BASE + 0x1000
+#define PORT_A_BASE (PERIPH_BASE + 0x1000)
+
+#define GPIOA_DIR (*(volatile uint32_t *)(PORT_A_BASE + 0x4))
+#define GPIOA (*(volatile uint32_t *)(PORT_A_BASE + 0x0))
+
+int main(void) {
+  printf("hello from main\n");
+  // while (1) {
+  //     __asm("nop");
+  // }
+
+  GPIOA_DIR |= (1 << 0);
+  while (1) {
+    GPIOA ^= (1 << 0);
+    for (volatile int i = 0; i < 100000; i++);
+  }
+}