From cb320a9537dc6a0ba314520ea30baf6f58c5dcb6 Mon Sep 17 00:00:00 2001 From: kuwoyuki Date: Mon, 9 Dec 2024 05:29:40 +0600 Subject: [PATCH] chore: cc --- include/rom.h | 1 - include/rtl8710bx.h | 11 ++++------ include/startup.h | 9 -------- include/system_rtl8710bx.h | 43 ++++++++++++++++++++++++++++++++++++++ src/boot.s | 38 ++------------------------------- src/main.c | 8 ++++--- src/system_rtl8710bx.c | 43 ++++++++++++++++++++++++++++++++++++++ 7 files changed, 97 insertions(+), 56 deletions(-) delete mode 100644 include/startup.h create mode 100644 include/system_rtl8710bx.h create mode 100644 src/system_rtl8710bx.c diff --git a/include/rom.h b/include/rom.h index be985fd..30b893f 100644 --- a/include/rom.h +++ b/include/rom.h @@ -5,7 +5,6 @@ extern uint32_t DiagPrintf(const char *fmt, ...) __attribute__((format(printf, 1, 2))); -extern void DelayMs(uint32_t ms); #define printf DiagPrintf diff --git a/include/rtl8710bx.h b/include/rtl8710bx.h index e881a99..3dfcbbf 100644 --- a/include/rtl8710bx.h +++ b/include/rtl8710bx.h @@ -1217,12 +1217,13 @@ typedef struct { (((uint32_t)(val) << 8) & BKUP_RTC_BACKUP_MASK)) /* rtl8710b_clk.h */ -#define CLK_TABLE_ROM 0x00046E68 -#define XTAL_TABLE_ROM 0x00046E10 - /* Clock source position and mask */ #define CPU_CLK_POS 4 +/* Clock freq set macro */ +#define SET_CPU_CLOCK(source) \ + (SYSTEM_CTRL->CLK_CTRL1 = (SYSTEM_CTRL->CLK_CTRL1 & ~SYS_CLK_CPU_CLK_SEL) | (source)) + /* Clock sources - values pre-shifted to position */ #define CPU_CLK_125M (0 << CPU_CLK_POS) #define CPU_CLK_62_5M (1 << CPU_CLK_POS) @@ -1231,10 +1232,6 @@ typedef struct { #define CPU_CLK_XTAL (4 << CPU_CLK_POS) #define CPU_CLK_ANA_4M (5 << CPU_CLK_POS) -/* Clock control macro */ -#define SET_CPU_CLOCK(source) \ - (SYSTEM_CTRL->CLK_CTRL1 = (SYSTEM_CTRL->CLK_CTRL1 & ~CPU_CLK_MASK) | (source)) - /* NCO32k (NCO1) CLK_INFO Register Bits */ #define NCO1_CLK_INFO_FREQ_MASK 0x00FFFFFF /* Unregulated clock freq */ #define NCO1_CLK_INFO_32K_RDY (1 << 24) /* 32K clock output rdy */ diff --git a/include/startup.h b/include/startup.h deleted file mode 100644 index f1191c0..0000000 --- a/include/startup.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef STARTUP_H -#define STARTUP_H - -#include - -// from bootloader -extern uint32_t SystemCoreClock; - -#endif // STARTUP_H diff --git a/include/system_rtl8710bx.h b/include/system_rtl8710bx.h new file mode 100644 index 0000000..906b6c2 --- /dev/null +++ b/include/system_rtl8710bx.h @@ -0,0 +1,43 @@ +#ifndef SYSTEM_RTL8710BX +#define SYSTEM_RTL8710BX + +#include + +#ifdef USE_ROM_TABLES +#define CPU_CLK_TABLE 0x00046E68 +#define XTAL_TABLE_ROM 0x00046E10 +#else + +/* CPU clock frequency table (Hz) */ +static const uint32_t CPU_CLK_TABLE[] = { + 125000000, /* 125 MHz */ + 62500000, /* 62.5 MHz */ + 31250000, /* 31.25 MHz */ + 15625000, /* 15.625 MHz */ + 7812500, /* 7.8125 MHz */ + 4000000 /* 4 MHz */ +}; + +/* Crystal oscillator frequency table (Hz) */ +static const uint32_t XTAL_TABLE[] = { + 40000000, /* 40 MHz */ + 25000000, /* 25 MHz */ + 13000000, /* 13 MHz */ + 19200000, /* 19.2 MHz */ + 20000000, /* 20 MHz */ + 26000000, /* 26 MHz */ + 38400000, /* 38.4 MHz */ + 17664000, /* 17.664 MHz */ + 16000000, /* 16 MHz */ + 14318000, /* 14.318 MHz */ + 12000000, /* 12 MHz */ +}; +#endif + +/* System Clock Frequency (Core Clock)*/ +extern uint32_t SystemCoreClock; + +void SystemCoreClockUpdate(void); +void SystemInit(void); + +#endif // SYSTEM_RTL8710BX diff --git a/src/boot.s b/src/boot.s index 03aab2e..25af88e 100644 --- a/src/boot.s +++ b/src/boot.s @@ -1,40 +1,6 @@ .syntax unified .cpu cortex-m4 -.section .data -.global SystemCoreClock -SystemCoreClock: .word 0 - -/* these match defines in rtl8710bx.h */ -.equ SYSON_CLK_CTRL1, 0x40000014 -.equ CLK_TABLE_ROM, 0x46E68 -.equ CPU_CLK_POS, 4 - -.section .text -.thumb_func -_startup: - /* zero .bss section */ - ldr r0, =_bss_start - ldr r1, =_bss_end - movs r2, #0 -1: cmp r0, r1 - itt lt - strlt r2, [r0], #4 - blt 1b - - /* set up SystemCoreClock */ - ldr r0, =SYSON_CLK_CTRL1 - ldr r2, =CLK_TABLE_ROM - ldr r1, [r0] - ldr r0, =SystemCoreClock - lsrs r1, r1, #CPU_CLK_POS - ldr r2, [r2, r1, lsl #2] - str r2, [r0] - - cpsie i - bl main -1: b 1b - .global _init /* cold boot from ROM */ _init: @@ -44,7 +10,7 @@ _init: ldr r1, =0xE000ED08 str r0, [r1] - b _startup + b SystemInit .section .vectors .global _vector_table @@ -274,6 +240,6 @@ Default_Handler: .global Reset_Handler .thumb_func Reset_Handler: - b _startup + b SystemInit .end diff --git a/src/main.c b/src/main.c index d78611e..45540a4 100644 --- a/src/main.c +++ b/src/main.c @@ -3,7 +3,7 @@ #include "rom.h" #include "rtl8710bx.h" -#include "startup.h" +#include "system_rtl8710bx.h" __attribute__((interrupt)) void SysTick_Handler(void) { GPIOA->DR ^= (1 << 23); @@ -13,15 +13,17 @@ int main(void) { printf("[main]\n"); printf("VTOR: 0x%08x\n", SCB->VTOR); printf("SystemCoreClock: %d Hz\n", SystemCoreClock); + SET_CPU_CLOCK(CPU_CLK_62_5M); + SystemCoreClockUpdate(); + printf("SystemCoreClock afer update: %d Hz\n", SystemCoreClock); - SysTick_Config(100); // tick every 100 cycles + SysTick_Config(100); // tick / 100 cycles PERI_ON->SOC_PERI_FUNC1_EN |= BIT_PERI_GPIO_EN; PERI_ON->PESOC_CLK_CTRL |= APBPeriph_GPIO_CLOCK; PINMUX_Config(_PA_0, PINMUX_FN_GPIO, GPIO_PuPd_DOWN); PINMUX_Config(_PA_23, PINMUX_FN_GPIO, GPIO_PuPd_NOPULL); GPIOA->DDR |= (1 << 0) | (1 << 23); - // GPIOA->DDR |= (1 << 23); while (1) { } diff --git a/src/system_rtl8710bx.c b/src/system_rtl8710bx.c new file mode 100644 index 0000000..97ae717 --- /dev/null +++ b/src/system_rtl8710bx.c @@ -0,0 +1,43 @@ +#include "system_rtl8710bx.h" + +#include + +#include "rtl8710bx.h" + +uint32_t SystemCoreClock; + +void SystemCoreClockUpdate(void) { + uint32_t current_clk_idx = + (SYSTEM_CTRL->CLK_CTRL1 & SYS_CLK_CPU_CLK_SEL) >> CPU_CLK_POS; + SystemCoreClock = CPU_CLK_TABLE[current_clk_idx]; +} + +__attribute__((naked)) void SystemInit(void) { + asm volatile( + /* zero .bss section */ + "ldr r0, =_bss_start\n" + "ldr r1, =_bss_end\n" + "movs r2, #0\n" + "1:\n" + "cmp r0, r1\n" + "itt lt\n" + "strlt r2, [r0], #4\n" + "blt 1b\n" + "\n" + /* set up SystemCoreClock */ + "ldr r0, =%0\n" + "ldr r2, =%1\n" + "ldr r1, [r0]\n" + "ldr r0, =%2\n" + "lsrs r1, r1, %3\n" + "ldr r2, [r2, r1, lsl #2]\n" + "str r2, [r0]\n" + "\n" + "cpsie i\n" + "bl main\n" + "b 1b\n" /* if main ever returns */ + : + : "i"(&SYSTEM_CTRL->CLK_CTRL1), "i"(&CPU_CLK_TABLE), + "i"(&SystemCoreClock), "i"(CPU_CLK_POS) + : "r0", "r1", "r2", "r3", "memory"); +}